AI Chip RTL Design Engineer — Fast-Paced, Verification

The Consensus; San Jose (CA); On-site; USD 140,000 - 180,000; Full time

Benefits offered by this job

Medical, dental & vision

Housing subsidy

Relocation support

Wellness benefits

Daily meals

Unlimited compute budget

Job summary

Etched seeks an experienced RTL Engineer to ensure AI chips operate correctly and efficiently. You will develop verification strategies for ASIC designs and work on state-of-the-art ML architectures. The role offers a fast-paced, autonomous environment with meaningful impact on chip performance.

You will contribute to projects like implementing floating point math blocks and optimizing timing and area. A strong background in RTL and verification, plus a willingness to learn transformer concepts,

Qualifications

• At least 5 years of work experience in RTL development.
• Experience with high-speed digital logic.
• Proficiency in standard RTL design and synthesis tools.
• Familiarity with verification work and writing test benches.

Responsibilities

• Develop and implement design verification strategies for RTL ASIC designs.
• Implement a block to efficiently compute floating point math operators.
• Provide feedback to the uArch team to meet timing and area constraints.

Skills

High-speed digital logic

RTL development

Verification concepts

Willingness to learn AI transformers

Tools

Verilog

SystemVerilog

VHDL

EDA tools

Python

Job description

Etched seeks an experienced RTL Engineer to ensure AI chips operate correctly and efficiently. You will develop verification strategies for ASIC designs and work on state-of-the-art ML architectures. The role offers a fast-paced, autonomous environment with meaningful impact on chip performance.

You will contribute to projects like implementing floating point math blocks and optimizing timing and area. A strong background in RTL and verification, plus a willingness to learn transformer concepts,