Lead Digital Implementation & Signoff AE

Cadence Design Systems, Inc.; San Jose (CA); Presencial; USD 106.000 - 198.000; Jornada completa

Descripción de la vacante

Cadence Design Systems, Inc. in San Jose, CA, is seeking an expert Digital Implementation and Signoff Field Applications Engineer to work with leading-edge customers, enabling deployment of Cadence tools to meet PPA targets and design closure.

You will collaborate with Cadence R&D to capture customer requirements, demonstrate Cadence technologies, and drive adoption of Place and Route, timing and power signoff across advanced nodes. Strong scripting skills required.

Formación

• 5 years of industry Physical Design experience.
• Strong knowledge in Digital Design Fundamentals, Semiconductor fundamentals, and Static Timing Analysis.
• Experience with IC digital implementation flows and backend EDA tools including Place and Route, IR Drop, backend design timing and power closure.
• Experience with advanced nodes 10nm and below.
• Experience in scripting languages such as Tcl/Perl/Python is a must.
• Strong customer-facing communication and problem-solving skills.
• Strong personal drive for continuous learning and expanding professional skill sets.
• Strong verbal, written, and customer communication skills.
• BS degree Computer Science/Engineering, Electrical, Engineering, or related field.

Responsabilidades

• Be part of team of Application Engineers providing technical support to Cadence customers in Backend Digital Design Implementation and Signoff including Place and Route, Design Closure, and timing/power signoff.
• Guide customers on how to best utilize Cadence technologies to achieve their design goals and meet project schedules.
• Collaborate with team to conduct technical presentations and product demonstrations.
• Drive technical evaluations/benchmarks to success.
• Work closely with R&D to enhance the tools and methodologies to meet and exceed customer’s requirements.
• Drive adoption and proliferation of Cadence tools and technologies.
• Provide guidance to the team to amend & augment the flow as needed using Tcl and/or other programming skills to meet objectives and improve results/flows.
• Capture best practices and lessons learned from current evaluations/benchmarks and utilize to improve efficiency and success rate in next engagements.

Conocimientos

Physical Design Fundamentals

Static Timing Analysis

Digital Design

IC digital implementation

Place and Route

Power closure

Tcl scripting

Python scripting

Customer facing communication

Communication skills

Educación

BS in Computer Science/Engineering/Electrical

MS degree (preferred)

Herramientas

Genus

Innovus

Conformal

Tempus

Modus

Voltus

ICC

ICC2

DC

Primetime

Descripción del empleo

Cadence Design Systems, Inc. in San Jose, CA, is seeking an expert Digital Implementation and Signoff Field Applications Engineer to work with leading-edge customers, enabling deployment of Cadence tools to meet PPA targets and design closure.

You will collaborate with Cadence R&D to capture customer requirements, demonstrate Cadence technologies, and drive adoption of Place and Route, timing and power signoff across advanced nodes. Strong scripting skills required.