Senior Principal IC, Digital Flow AE – Equity & Impact

Cadence; San Jose (CA); On-site; USD 148,000 - 276,000; Full time

Benefits offered by this job

Bonus potential

Equity options

Medical, dental, and vision plans

401(k) with employer match

Employee stock purchase plan

Job summary

Cadence in California seeks an expert Digital Implementation and Signoff Field Applications Engineer for backend digital design implementation, signoff, and fast design closure. You will partner with Cadence R&D and customers, delivering technical leadership across Place and Route, Design Closure, and timing/power signoff to meet PPA targets.

With 10+ years in physical design and strong scripting skills, you will guide customers, conduct demonstrations, and drive evaluations, while shaping

Qualifications

• BS degree in Computer Science/Engineering, Electrical, Engineering, or related field.
• 10+ years of industry Physical Design experience.
• Strong knowledge in Digital Design Fundamentals, Semiconductor fundamentals, and Static Timing Analysis.
• Experience with IC digital implementation flows and backend EDA tools including Place and Route, IR Drop, backend design timing and power closure.
• Experience with advanced nodes 10nm and below.
• Experience in scripting languages such as Tcl/Perl/Python is a must.
• Strong customer-facing communication and problem-solving skills.
• Strong verbal, written, and customer communication skills.

Responsibilities

• Be part of team of Application Engineers providing technical support to Cadence customers in Backend Digital Design Implementation and Signoff including Place and Route, Design Closure, and timing/power signoff.
• Guide customers on how to best utilize Cadence technologies to achieve their design goals and meet project schedules.
• Collaborate with team to conduct technical presentations and product demonstrations.
• Drive technical evaluations/benchmarks to success.
• Work closely with R&D to enhance the tools and methodologies to meet and exceed customer’s requirements.
• Drive adoption and proliferation of Cadence tools and technologies.
• Provide guidance to the team to amend & augment the flow using Tcl and/or other programming skills to meet objectives and improve results/flows.
• Capture best practices and lessons learned from current evaluations/benchmarks for future engagements.

Skills

Physical Design

Scripting (Tcl/Perl/Python)

Customer-facing communication

Digital Design Fundamentals

Static Timing Analysis

Education

BS degree in Computer Science/Engineering or related field

MS degree in Computer Science/Engineering or related field

Tools

Genus

Innovus

Conformal

Tempus

Modus

Voltus

ICC/ICC2

DC

Primetime

Job description

Cadence in California seeks an expert Digital Implementation and Signoff Field Applications Engineer for backend digital design implementation, signoff, and fast design closure. You will partner with Cadence R&D and customers, delivering technical leadership across Place and Route, Design Closure, and timing/power signoff to meet PPA targets.

With 10+ years in physical design and strong scripting skills, you will guide customers, conduct demonstrations, and drive evaluations, while shaping