Senior Principal Digital Flow AE: Customer Impact Leader

Cadence Design Systems

San Jose (CA)

On-site

USD 148,000 - 276,000

Full time

14 days+

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Benefits offered by this job

paid vacation and paid holidays
401(k) plan with employer match
employee stock purchase plan
medical, dental and vision plan
and more

Job summary

Cadence Design Systems is seeking an expert Digital Implementation and Signoff Field Applications Engineer in California. You will work side-by-side with customers to deploy Cadence technologies in Synthesis, P&R, and Signoff, helping teams meet PPA targets and close designs faster while feeding customer requirements back to R&D.

The role requires 10+ years in physical design, strong timing knowledge, and scripting in Tcl/Perl/Python.

Qualifications

  • Minimum 10+ years of industry experience.
  • Physical Design experience.
  • BS or higher in Computer Science/Engineering, Electrical or related field.
  • Strong knowledge in Digital Design Fundamentals, Semiconductor fundamentals, and Static Timing Analysis.
  • Experience with IC digital implementation flows and backend EDA tools including Place and Route, IR Drop, backend design timing and power closure.
  • Experience with advanced nodes 10nm and below.
  • Scripting languages Tcl/Perl/Python required.
  • Strong customer-facing communication and problem-solving skills.
  • Preferred MS degree in related field; familiarity with Cadence tools.

Responsibilities

  • Be part of a team of Application Engineers providing technical support in Backend Digital Design Implementation and Signoff.
  • Guide customers to best utilize Cadence technologies to meet design goals and schedules.
  • Collaborate on technical presentations and product demonstrations.
  • Drive technical evaluations/benchmarks to success.
  • Work with R&D to enhance tools and methodologies to meet customer requirements.
  • Promote adoption and proliferation of Cadence tools and technologies.
  • Provide guidance to amend flows using Tcl and other programming skills to improve results.

Skills

Digital design fundamentals
Semiconductor fundamentals
Static timing analysis
IC digital implementation flows
Place and route
Scripting: Tcl/Perl/Python
Customer-facing communication

Education

BS degree Computer Science/Engineering, Electrical, Engineering, or related field
MS degree Computer Science/Engineering, Electrical, Engineering, or related field

Tools

Cadence Genus
Cadence Innovus
Cadence Conformal
Cadence Tempus
Cadence Modus
Cadence Voltus
Primetime
ICC/ICC2
DC

Job description

Cadence Design Systems is seeking an expert Digital Implementation and Signoff Field Applications Engineer in California. You will work side-by-side with customers to deploy Cadence technologies in Synthesis, P&R, and Signoff, helping teams meet PPA targets and close designs faster while feeding customer requirements back to R&D.

The role requires 10+ years in physical design, strong timing knowledge, and scripting in Tcl/Perl/Python.

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