Lead ASIC DFT Engineer for Silicon One

Cisco Systems, Inc; Austin (TX); On-site; USD 187,000 - 268,000; Full time

Job summary

The Silicon One development organization at Cisco Systems, Inc. is seeking an ASIC Technical Leader- DFT to drive DFT requirements early in the design cycle and collaborate with Front-end RTL and backend physical design teams.

You will help shape next-generation networking chips, lead DFT and quality processes through implementation and post-silicon validation, and gain exposure to signoff activities in a fast-paced, globally distributed team.

Qualifications

• Bachelor's or Master's Degree in Electrical or Computer Engineering.
• 10+ years of experience in ASIC/DFT engineering.
• Experience with JTAG, Scan and BIST architectures.
• Experience with ATPG and EDA tools like TestMax, Tetramax, Tessent, PrimeTime.
• Gate-level simulation experience with VCS and other simulators.
• Post-silicon validation and debug with ATE patterns (P1687).

Responsibilities

• Lead DFT requirements early in the design cycle with Front-end RTL and backend physical design teams.
• Contribute to crafting next-generation networking chips in the Silicon One team.
• Drive DFT and quality processes through implementation flow and post-silicon validation phases.

Skills

JTAG protocols

Scan architecture

BIST architectures

ATPG

EDA tools

VCS debugging

Education

Bachelor's or Master's in Electrical or Computer Engineering

Tools

TestMax

Tetramax

Tessent

PrimeTime

Job description

The Silicon One development organization at Cisco Systems, Inc. is seeking an ASIC Technical Leader- DFT to drive DFT requirements early in the design cycle and collaborate with Front-end RTL and backend physical design teams.

You will help shape next-generation networking chips, lead DFT and quality processes through implementation and post-silicon validation, and gain exposure to signoff activities in a fast-paced, globally distributed team.