Lead ASIC Design & Verification Engineer

Synopsys; Austin (TX); On-site; USD 140,000 - 190,000; Full time

Job summary

Synopsys is seeking an experienced ASIC Digital Design Engineer in Austin, TX. You will design and verify complex ASIC blocks, collaborating with analog, physical design, and applications teams to ensure robust integration across the flow.

You will develop test plans, apply industry-standard EDA methodologies to improve PPA, and mentor junior engineers while staying current with trends and tools in high-performance silicon design.

Qualifications

• Proven experience in ASIC digital design and verification.
• Strong RTL design expertise and problem solving.
• Familiarity with industry-standard EDA workflows.

Responsibilities

• Design and verify complex ASIC blocks and subsystems.
• Collaborate with analog, physical design, and applications teams.
• Develop and execute test plans to verify functionality and performance.
• Apply EDA methodologies to optimize power, performance and area.
• Mentor junior engineers and share technical knowledge.

Skills

RTL design

ASIC verification

EDA tools

HDL languages

Collaboration

Education

BSEE/BSCE degree

Tools

EDA tools

Job description

Synopsys is seeking an experienced ASIC Digital Design Engineer in Austin, TX. You will design and verify complex ASIC blocks, collaborating with analog, physical design, and applications teams to ensure robust integration across the flow.

You will develop test plans, apply industry-standard EDA methodologies to improve PPA, and mentor junior engineers while staying current with trends and tools in high-performance silicon design.