Interface Pathfinding HW Engineer - Characterization & AI

Micron Technology; Boise (ID); On-site; USD 120,000 - 180,000; Full time

Job summary

Micron Technology in Boise, Idaho seeks an Interface Pathfinding Hardware Development Engineer to own high-speed interface characterization from planning through silicon correlation. You will lead bench development, data acquisition, and the measurement‑uncertainty budget, collaborating with analog, digital, and layout teams to meet specifications.

You will drive AI-enabled workflows for characterization, mentor peers, and help scale the program with increasing scope, ultimately delivering

Qualifications

• MSEE with 10+ years or BSEE with 12+ years in semiconductor characterization or test engineering.
• Experience with high-speed time-domain measurement and jitter analysis.
• BER and pattern generator/analyzer operation for link margining; switch-matrix automation with per-path de-skew.
• Root Cause and Corrective Action through PCA and First-Principles DOE.
• Instrument automation for characterization across corners and conditions.
• PDN and load-transient measurement; bench reference-clock and supply-noise realism.
• Development of simulation plans to pre-validate test approaches; DOE in characterization.
• First silicon bring-up of an internally designed device.
• Frequency-domain fixture de-embedding (VNA S-parameters, 2x-thru or TRL, TDR) correlated to models.
• Technical representation of the engineering organization to customers or vendors.
• Cross-organizational leadership: methodologies/tools/frameworks adopted beyond the program.
• Agentic AI workflow construction and deployment including analysis and automation.

Responsibilities

• Derive the electrical characterization plan from architecture specification and SI budget before RTL freeze.
• Author observability and test-access requirements into the register map before RTL freeze.
• Develop and own the characterization architecture from hardware specs to the automated data acquisition framework.
• Measure, calibrate, and de-embed characterization hardware to isolate device performance from noise.
• Serve as the program’s expert across link and timing integrity, power delivery, I/O-ring robustness, environmental corners, and first-silicon bring-up.
• Co-author the per-revision sim-to-silicon correlation report with the SI engineer and lead the debug team when silicon deviates from simulation.
• Sign the characterization-readiness items on the tape-out checklist, then author the post-silicon characterization report.
• Define bench capability against target data rates, represent findings to vendors/standards bodies, and mentor junior engineers.
• Architect, implement, and document AI-assisted development and characterization pipelines.

Job description

Micron Technology in Boise, Idaho seeks an Interface Pathfinding Hardware Development Engineer to own high-speed interface characterization from planning through silicon correlation. You will lead bench development, data acquisition, and the measurement‑uncertainty budget, collaborating with analog, digital, and layout teams to meet specifications.

You will drive AI-enabled workflows for characterization, mentor peers, and help scale the program with increasing scope, ultimately delivering