Senior Signal Integrity Engineer – High‑Speed Interfaces

1000 Micron Technology, Inc.; Boise (ID); On-site; USD 150,000 - 210,000; Full time

Benefits offered by this job

Medical, dental and vision plans

Paid time off

Paid holidays

Job summary

Micron Technology, Inc. in Boise, Idaho seeks a Principal Signal Integrity Engineer to lead high-speed interface analysis across modeling, channel, and packaging domains.

You will own interconnect models from extraction to simulation and drive feasibility studies with cross-functional teams. The role emphasizes hands-on electromagnetic modeling, time- and frequency-domain analysis, and development of design rules and link budgets.

Qualifications

• MS or PhD in Electrical Engineering (MS with strong electromagnetic/SI fundamentals accepted).
• 10+ years of industry experience in signal or power integrity analysis for high-speed interfaces.
• Extensive experience with electromagnetic and transmission line theory for SI/PI analysis.

Responsibilities

• Own generation and validation of interconnect models from field solver extraction to time-/frequency-domain simulation.
• Lead SI assessment of forward-looking substrate and packaging technologies; translate characteristics into performance projections.
• Drive SI analysis during feasibility studies including I/O and channel co-optimization; guide supporting teams.

Skills

Signal integrity analysis

Electromagnetic theory

Analytical decision making

Written communication

Cross-disciplinary collaboration

Education

MS in Electrical Engineering

PhD preferred

Tools

ADS

HSPICE

SPECTRE

Q3D

SIWAVE

HFSS

Oscilloscope

VNA

Job description

Micron Technology, Inc. in Boise, Idaho seeks a Principal Signal Integrity Engineer to lead high-speed interface analysis across modeling, channel, and packaging domains.

You will own interconnect models from extraction to simulation and drive feasibility studies with cross-functional teams. The role emphasizes hands-on electromagnetic modeling, time- and frequency-domain analysis, and development of design rules and link budgets.