Principal SI Engineer - High-Speed Interface Pathfinding

Micron Technology, Inc; Boise, Northern (ID, KY); Hybrid; USD 119,000 - 320,000; Full time

Job summary

Micron Technology, Inc. is seeking a Principal Signal Integrity Engineer to lead high-speed interface analyses and develop robust interconnect models.

You will own modeling from extraction to simulation, evaluate substrates and packaging technologies, and drive design-rule development for scalable SI performance. The role requires deep EM knowledge, advanced simulation skills, and strong collaboration across packaging, circuit, and system teams.

Qualifications

• MS or PhD in Electrical Engineering (MS accepted with strong EM/SI fundamentals).
• 10+ years of industry experience in SI analysis for high-speed interfaces.
• Extensive EM and transmission line theory for SI/PI analysis.
• Experience with time- and frequency-domain simulation tools (ADS, HSPICE, SPECTRE).
• Experience with electromagnetic field solvers and hardware measurement tools (oscilloscopes, VNA).

Responsibilities

• Own generation and validation of interconnect models—from field solver extraction to circuit simulation.
• Lead SI assessment of forward-looking substrates and packaging technologies.
• Drive SI analysis during pathfinding studies and coordinate with partner teams.
• Develop progressive package/system-level design rules grounded in EM analysis.
• Define link budgets and sim-to-silicon correlation methodologies.
• Collaborate across SI, circuit and chip design, packaging R&D, and system integration.
• Author analysis reports, modeling methodologies, and design rule documents.

Skills

10+ years experience

EM theory

Time-domain sim

HFSS/SiWave

Measurement tools

Education

MS or PhD in Electrical Engineering

Tools

ADS

HSPICE/SPECTRE

Q3D

SIWAVE

HFSS

Job description

Micron Technology, Inc. is seeking a Principal Signal Integrity Engineer to lead high-speed interface analyses and develop robust interconnect models.

You will own modeling from extraction to simulation, evaluate substrates and packaging technologies, and drive design-rule development for scalable SI performance. The role requires deep EM knowledge, advanced simulation skills, and strong collaboration across packaging, circuit, and system teams.