Senior SI Engineer - Pathfinding for High-Speed Interfaces

Micron Technology, Inc.; Richardson (TX); On-site; USD 119,000 - 320,000; Full time

Benefits offered by this job

Medical/Dental/Vision

Paid time off

Equity

Job summary

Micron Technology is a world leader in memory and storage innovations, seeking a Principal Signal Integrity Engineer to lead high‑speed interface investigations and model development. You will work on interconnect modeling, channel optimization, and cross‑disciplinary collaboration to drive forward‑looking SI solutions.

The role emphasizes rigorous analysis, hands-on measurement, and contributing to a robust IP portfolio within a small, senior team focused on pre‑silicon predictions and product

Qualifications

• MS or PhD in Electrical Engineering or related field.
• 10+ years of industry experience in signal or power integrity for high‑speed interfaces.
• Extensive experience applying electromagnetic and transmission line theory to SI/PI analysis.
• Experience with time‑ and frequency‑domain simulation tools (ADS, HSPICE, SPECTRE) and EM field solvers.

Responsibilities

• Own generation and validation of interconnect models from field solver extraction to circuit simulation.
• Lead SI assessment of forward‑looking substrate and packaging technologies.
• Drive SI analysis during pathfinding studies including I/O and channel co‑optimization.
• Develop and champion progressive package and system‑level design rules grounded in EM analysis.
• Define forward‑looking link budgets and correlating sim‑to‑silicon methodologies.
• Collaborate across SI, Circuit/Chip Design, Packaging R&D, and System Integration.

Skills

Signal Integrity

Electromagnetic

Time-Domain

Frequency-Domain

Cross-Functional

Strong Communication

Education

PhD in Electrical Engineering

MS in Electrical Engineering

Tools

ADS

HSPICE

SPECTRE

HFSS

Q3D

SIWAVE

Job description

Micron Technology is a world leader in memory and storage innovations, seeking a Principal Signal Integrity Engineer to lead high‑speed interface investigations and model development. You will work on interconnect modeling, channel optimization, and cross‑disciplinary collaboration to drive forward‑looking SI solutions.

The role emphasizes rigorous analysis, hands-on measurement, and contributing to a robust IP portfolio within a small, senior team focused on pre‑silicon predictions and product