IC Layout Engineer – End-to-End Tapeout Lead

Rise Technical Recruitment Limited; Plano (TX); On-site; USD 110,000 - 130,000; Full time

Benefits offered by this job

Stock options

Health benefits

401(k)

Technical training

Job summary

Rise Technical Recruitment Limited is seeking an IC Layout Engineer for a fabless semiconductor specialist in Plano, Texas. You will own full-chip layouts from floorplan through tapeout and contribute to radiation‑hardened ICs for spacecrafts, offering strong ownership and ongoing technical development.

You will lead floorplanning, power/ground grid work, ESD structures, and standard-cell library support, using LVS/DRC tooling and collaborating with design engineers, project owners, and

Qualifications

• Experience in IC/semiconductor layout across modern nodes.
• Strong LVS/DRC verification knowledge with layout tools.
• Solid understanding of layout integrity topics (ESD, latch-up, cross-talk).

Responsibilities

• Own full-chip IC layout from floorplan through tapeout (.gds/.oasis).
• Develop power/ground grids and routing plans.
• Implement ESD structures and document verification flows.
• Collaborate with design engineering, project owners, foundry, and contractors.
• Work on-site in Plano, Texas as a full-time role.

Skills

LVS/DRC verification

Layout fundamentals

Analog/digital layout

Cross-functional collaboration

Tools

Cadence

PVS/Assura/Calibre

KiCad

Job description

Rise Technical Recruitment Limited is seeking an IC Layout Engineer for a fabless semiconductor specialist in Plano, Texas. You will own full-chip layouts from floorplan through tapeout and contribute to radiation‑hardened ICs for spacecrafts, offering strong ownership and ongoing technical development.

You will lead floorplanning, power/ground grid work, ESD structures, and standard-cell library support, using LVS/DRC tooling and collaborating with design engineers, project owners, and