Senior IC Layout Engineer - Space/Defense Tapeout Ownership

Rise Technical Recruitment Limited; Plano (TX); On-site; USD 110,000 - 130,000; Full time

Benefits offered by this job

Stock Options

Health Benefits

401(k)

Training & Development

Space/Defense tech exposure

Job summary

Rise Technical Recruitment Limited is seeking an IC Layout Engineer for a Plano-based role in the Dallas–Fort Worth area. You will own full-chip layouts from floorplan to tapeout and work on power/ground grids, ESD structures, and verification flows.

The position targets candidates with strong analog/digital layout fundamentals and experience with LVS/DRC tools. On-site role with a fabless semiconductor focus and opportunities in aerospace/space tech.

Qualifications

• Experience with full-chip IC layout from floorplan to tapeout
• Strong LVS/DRC verification knowledge
• Solid analog and digital layout fundamentals

Responsibilities

• Own full-chip IC layout from floorplan through tapeout (.gds/.oasis)
• Develop power/ground grids, routing/channel planning and EMI considerations
• Implement ESD structures and document verification flows
• Collaborate with design engineers, project owners, foundry and contractors

Skills

Full-chip layout ownership

Analog/digital layout fundamentals

Tools

Cadence

PVS/Assura/Calibre

KiCad

Job description

Rise Technical Recruitment Limited is seeking an IC Layout Engineer for a Plano-based role in the Dallas–Fort Worth area. You will own full-chip layouts from floorplan to tapeout and work on power/ground grids, ESD structures, and verification flows.

The position targets candidates with strong analog/digital layout fundamentals and experience with LVS/DRC tools. On-site role with a fabless semiconductor focus and opportunities in aerospace/space tech.