Head of Packaging - Silicon Photonics AI Hardware

SBT; San Francisco (CA); On-site; USD 180,000 - 260,000; Full time

Job summary

SBT is seeking a Head of Packaging to lead a talented team in San Francisco, developing advanced packaging solutions for multi-chip packages and high-speed silicon photonics chips. The role emphasizes mentorship, cross-functional collaboration, and delivering reliable, scalable packaging architectures.

You will drive die bonding, wire bonding, flip-chip, and encapsulation processes, while partnering with silicon photonics and electrical engineers to ensure robust performance, long-term

Qualifications

• Advanced degree in Electrical/Mechanical Engineering or Applied Physics.
• Proven experience in advanced packaging design and development.
• Expertise in flip-chip, wafer-level packaging, and 3D integration.

Responsibilities

• Lead and mentor engineers in multi-chip packaging and high-speed silicon photonics.
• Collaborate across functions to meet performance and reliability targets.
• Develop and optimize die bonding, wire bonding, flip-chip and encapsulation processes.
• Co-package optical components with silicon photonic ICs for durable performance.
• Create test plans and analyze data to guide future designs.
• Produce detailed design docs, specs, and test reports.

Skills

Team leadership

Packaging design

silicon photonics

3D integration

Education

M.S. or Ph.D. in EE/Mechanical/Applied Physics

Tools

ANSYS

Cadence/EDA tools

Job description

SBT is seeking a Head of Packaging to lead a talented team in San Francisco, developing advanced packaging solutions for multi-chip packages and high-speed silicon photonics chips. The role emphasizes mentorship, cross-functional collaboration, and delivering reliable, scalable packaging architectures.

You will drive die bonding, wire bonding, flip-chip, and encapsulation processes, while partnering with silicon photonics and electrical engineers to ensure robust performance, long-term