Head of Packaging (Co-Packaged Optics)

SBT; San Francisco (CA); On-site; USD 180,000 - 260,000; Full time

Job summary

SBT is seeking a Head of Packaging to lead a talented team in San Francisco, developing advanced packaging solutions for multi-chip packages and high-speed silicon photonics chips. The role emphasizes mentorship, cross-functional collaboration, and delivering reliable, scalable packaging architectures.

You will drive die bonding, wire bonding, flip-chip, and encapsulation processes, while partnering with silicon photonics and electrical engineers to ensure robust performance, long-term

Qualifications

• Advanced degree in Electrical/Mechanical Engineering or Applied Physics.
• Proven experience in advanced packaging design and development.
• Expertise in flip-chip, wafer-level packaging, and 3D integration.

Responsibilities

• Lead and mentor engineers in multi-chip packaging and high-speed silicon photonics.
• Collaborate across functions to meet performance and reliability targets.
• Develop and optimize die bonding, wire bonding, flip-chip and encapsulation processes.
• Co-package optical components with silicon photonic ICs for durable performance.
• Create test plans and analyze data to guide future designs.
• Produce detailed design docs, specs, and test reports.

Skills

Team leadership

Packaging design

silicon photonics

3D integration

Education

M.S. or Ph.D. in EE/Mechanical/Applied Physics

Tools

ANSYS

Cadence/EDA tools

Job description

SBT is the exclusive executive recruiting firm for this confidential position.

Overview

SBT's client has developed a groundbreaking technology platform that integrates the properties of advanced materials with the capabilities of silicon photonics, aimed at driving transformative leaps forward in the efficiency of AI workloads. This startup is attempting to solve some of the most difficult challenges facing the industry related to mathematics, engineering, and physics. The Head of Packaging will be instrumental in shaping the company’s future and pushing the boundaries of optical technology and AI hardware.

Responsibilities

• Lead and mentor a high-performing team of engineers and scientists in the development of advanced packaging solutions for multi-chip packages and high-speed silicon photonics chips.
• Collaborate with cross-functional teams to design and develop innovative packaging solutions that meet stringent performance and reliability requirements.
• Develop and optimize packaging processes, including die bonding, wire bonding, flip-chip bonding, and encapsulation, to ensure seamless transition from design to production.
• Work closely with silicon photonics and electrical engineers to co-package optical components with silicon photonic integrated circuits, ensuring reliable performance and long-term stability.
• Design and develop comprehensive test plans to evaluate package performance, reliability, and manufacturability, and conduct rigorous testing and validation of packaged systems.
• Create detailed design documentation, including engineering drawings, specifications, and test reports, and analyze test data to identify areas for improvement and optimize future designs.

Qualifications

• Advanced degree (Masters or Ph.D.) in Electrical Engineering, Mechanical Engineering, Applied Physics, or a related field.
• Proven industry experience in advanced packaging design, simulation, and development, with a strong understanding of packaging technologies, including flip-chip, wafer-level packaging, and 3D integration.
• Experience with high-speed interconnect technologies such as silicon photonics and microelectronics, and packaging design and development for silicon photonics devices.

Current and past relevant companies include: AMD, Intel, Lightmatter, Broadcom, Mellanox, Cisco, Coherent, Macom, GlobalFoundries, and other Photonics/Optical startups