HBM Memory Design Architect - Equity Options

Micron Technology, Inc; Folsom (CA); On-site; USD 97,000 - 205,000; Full time

Benefits offered by this job

Medical, dental, vision

Equity & Bonuses

Paid time off

Retirement plan

Job summary

Micron Technology, Inc. is seeking an HBM Memory Design Architect to join the HBM architect team. You will design and analyze digital and analog circuits used in memory products, including DRAM, and work with a highly innovative team.

Candidates should have extensive CMOS circuit design and device physics knowledge, experience with schematic entry and simulation tools, and the ability to evaluate timing, power, and area trade-offs.

Qualifications

• Ph.D. or Master’s degree in a related field
• Extensive CMOS circuit design and device physics knowledge
• Experience with schematic entry and circuit simulation
• Design or verification experience in DRAM products is a plus
• Strong analytical and communication skills

Responsibilities

• Design and analyze digital and analog circuits used in memory products
• Simulate, optimize, and floor plan DRAM circuits
• Evaluate full‑chip or block‑level functionality and provide solutions
• Balance timing, area, and power in high‑speed memory designs
• Contribute to new HBM product opportunities through architectural exploration

Skills

CMOS circuit design

Device physics

DRAM circuit design

High-speed clocking

Interface development

Logic design

Power delivery optimization

Schematic entry

HSPICE

FineSim

Education

Ph.D. or Master’s in Electrical Engineering or related field

Tools

HSPICE

FineSim

Job description

Micron Technology, Inc. is seeking an HBM Memory Design Architect to join the HBM architect team. You will design and analyze digital and analog circuits used in memory products, including DRAM, and work with a highly innovative team.

Candidates should have extensive CMOS circuit design and device physics knowledge, experience with schematic entry and simulation tools, and the ability to evaluate timing, power, and area trade-offs.