Senior HBM Memory Architect

Micron Technology; Folsom (CA); On-site; USD 97,000 - 205,000; Full time

Job summary

Micron Technology is seeking an HBM Memory Design Architect to design and analyze digital/analog circuits for memory products. You will simulate, optimize, and floor plan DRAM circuits, evaluating full chip functionality and trade-offs to deliver functionally correct designs, within a highly innovative team.

The role requires expertise in CMOS design, device physics, and DRAM/HBM technology, with collaboration across memory, logic, and analog areas. Competitive US-based salary and benefits apply.

Qualifications

• Extensive knowledge of CMOS Circuit Design and Device Physics.
• Extensive knowledge of schematic entry and simulation using Finesim and/or Hspice.
• Design or Verification or layout experience of DRAM product (DDR, LPDDR, HBM, CIM) is a plus.
• Excellent problem-solving and analytical skills.
• A self-motivated, enthusiastic team player who enjoys working with others.
• Good communication skills with the ability to convey complex technical concepts to other design and verification peers in verbal and written form.

Responsibilities

• Possess knowledge in DRAM circuit design, high-speed clocking and interface development.
• Evaluate full chip or block level functionality and ensure a functionally correct design.
• Understand timing, area, power, and complexity trade-offs in high-speed DRAM.
• Conduct pathfinding to explore new architectures for future HBM products and perform technical feasibility analyses.
• Contribute to development of new HBM product opportunities by assisting with design, layout, and optimization.
• Conduct research and design leveraging AI.

Skills

CMOS circuit design

Device physics

Schematic entry & simulation (FineSim,

Education

NCG Ph.D or NCG Master with relevant prior experience

Tools

FineSim

HSPice

Job description

Micron Technology is seeking an HBM Memory Design Architect to design and analyze digital/analog circuits for memory products. You will simulate, optimize, and floor plan DRAM circuits, evaluating full chip functionality and trade-offs to deliver functionally correct designs, within a highly innovative team.

The role requires expertise in CMOS design, device physics, and DRAM/HBM technology, with collaboration across memory, logic, and analog areas. Competitive US-based salary and benefits apply.