HBM Design Architecture Intern - AI Memory Research

Micron; Richardson (TX); On-site; USD 24,000 - 32,000; Full time

Benefits offered by this job

Medical insurance

Dental insurance

Vision insurance

Paid time off

Job summary

Micron Technology in Richardson, TX is seeking an HBM Design Architecture Intern to explore next-generation AI memory and system environments. You will work with senior engineers to support early-stage research, performance modeling, and tool development that guide architectural decisions.

The role provides hands-on exposure to AI system trends, memory subsystem analysis, and collaboration across design, DTPCO, and product teams.

Qualifications

• Pursuing a Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
• Cannot graduate prior to September 2027.
• Foundational understanding of computer architecture, digital systems, and hardware/software interaction.
• Programming experience in Python, C/C++, or similar languages.
• Ability to learn new tools, simulation frameworks, and data-analysis workflows.

Responsibilities

• Research emerging trends in compute, networking, and storage infrastructure to understand how future AI workloads may evolve.
• Support HBM architecture analysis by gathering and synthesizing data related to bandwidth, latency, and system-level memory requirements.
• Help develop or refine simulation frameworks used to model AI cluster performance and memory subsystem behavior.
• Participate in building trend dashboards using CSP benchmarks and industry datasets.
• Collaborate with DTPCO mentors to explore architectural intercept opportunities for next-generation AI systems.

Skills

Python

C/C++

Data analysis

Learning new tools

Education

Bachelor's or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science

Job description

Micron Technology in Richardson, TX is seeking an HBM Design Architecture Intern to explore next-generation AI memory and system environments. You will work with senior engineers to support early-stage research, performance modeling, and tool development that guide architectural decisions.

The role provides hands-on exposure to AI system trends, memory subsystem analysis, and collaboration across design, DTPCO, and product teams.