AI Memory Systems Architecture Intern

Micron Technology, Inc; Richardson (TX); On-site; USD 32,000 - 45,000; Full time

Job summary

Micron Technology, Inc. invites applications for an HBM Design Architecture Intern to help shape next‑gen AI memory systems. The role provides hands‑on exposure to AI system trends and memory subsystem analysis while collaborating with senior engineers and mentors.

You will support early‑stage research, performance modeling, and tool development, gaining practical experience in memory architectures and architectural decision processes relevant to AI workloads.

Qualifications

• Currently pursuing a Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field. Cannot graduate prior to September 2027.
• Foundational understanding of computer architecture, digital systems, and hardware/software interaction.
• Programming experience in Python, C/C++, or similar languages.
• Ability to learn new tools, simulation frameworks, and data‑analysis workflows.

Responsibilities

• Research emerging trends in compute, networking, and storage infrastructure to understand how future AI workloads may evolve.
• Support HBM architecture analysis by gathering and synthesizing data related to bandwidth, latency, and system‑level memory requirements.
• Help develop or refine simulation frameworks used to model AI cluster performance and memory subsystem behavior.
• Participate in building trend dashboards using CSP benchmarks and industry datasets.
• Collaborate with DTPCO mentors to explore architectural intercept opportunities for next‑generation AI systems.

Skills

Python

C/C++

Computer architecture

Data analysis

Education

Bachelor's or Master's in Electrical Engineering or Computer Science

Job description

Micron Technology, Inc. invites applications for an HBM Design Architecture Intern to help shape next‑gen AI memory systems. The role provides hands‑on exposure to AI system trends and memory subsystem analysis while collaborating with senior engineers and mentors.

You will support early‑stage research, performance modeling, and tool development, gaining practical experience in memory architectures and architectural decision processes relevant to AI workloads.