HBM Datapath Architect - High-Speed Memory Design

Micron Technology; Richardson (TX); On-site; USD 146,000 - 297,000; Full time

Benefits offered by this job

Medical plan

Dental plan

Vision plan

Paid time off

Paid holidays

Job summary

Micron Technology is seeking a highly motivated HBM Datapath Architect to design and optimize high-speed datapath circuitry for next-generation High Bandwidth Memory products. You will work across core and logic die with design, PHY, ECC, verification, and layout teams to deliver robust architectures through silicon bring-up and production.

The role requires 7+ years in high-speed datapath design and 3+ years in RTL/mixed-signal implementation, with strong knowledge of HBM architectures.

Qualifications

• 7+ years of relevant industry experience with a Bachelor's degree in engineering
• 5+ years with Master's degree in engineering
• 3+ years of high-speed datapath design experience
• 3+ years of RTL/mixed-signal datapath implementations

Responsibilities

• Architect and design HBM read and write datapath across core and logic die
• Develop high-speed, low-latency datapath circuits for multi-channel HBM
• Optimize datapath designs for bandwidth, power, area and timing closure
• Design and integrate data reliability features like ECC hooks and remapping
• Collaborate with cross-functional teams to translate specs into micro-architectures
• Drive RTL-level datapath implementations and verification activities
• Participate in design reviews and mentoring across HBM programs
• Utilize AI-enabled tools to improve productivity and problem solving

Skills

HBM architecture

Datapath design

RTL

Schematic

High-speed design

AI tools usage

Education

Bachelor's degree in Electrical Engineering or related

Master's degree in Electrical Engineering or related

Tools

Static timing analysis (STA)

Job description

Micron Technology is seeking a highly motivated HBM Datapath Architect to design and optimize high-speed datapath circuitry for next-generation High Bandwidth Memory products. You will work across core and logic die with design, PHY, ECC, verification, and layout teams to deliver robust architectures through silicon bring-up and production.

The role requires 7+ years in high-speed datapath design and 3+ years in RTL/mixed-signal implementation, with strong knowledge of HBM architectures.