HBM Architecture Intern for AI & HPC

Micron Technology, Inc.

Folsom (CA)

On-site

USD 57,000 - 81,000

Full time

12 days ago

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Benefits offered by this job

Medical, dental, vision plans
Paid time off
Holidays

Job summary

Micron Technology, Inc. in California is seeking a Memory Systems Architecture Intern to contribute to the architecture and microarchitecture development of next‑gen HBM products for AI, HPC, and data centers.

You will work with experienced architects to evaluate features, build performance models in Python and C++, and help define roadmaps while applying sound engineering judgment. Strong fundamentals in computer architecture and memory systems, plus hands‑on coding, are required; prior

Qualifications

  • 0-2 years of relevant experience through internships, research, academic projects, publications, or coursework.
  • Pursuing a Bachelor's, Master's, or PhD in Electrical/Computer Engineering or Computer Science.
  • Coursework or project experience in computer architecture and memory systems.
  • Programming experience with Python and at least one of C++, SystemVerilog, or similar languages.
  • Ability to read technical specifications and communicate findings clearly.
  • Experience using AI coding assistants in engineering workflows.

Responsibilities

  • Research and evaluate next-generation HBM architecture and microarchitecture features.
  • Develop performance models and analytical tools to assess trade-offs.
  • Analyze workload behavior and provide recommendations for product development.
  • Utilize AI-assisted workflows to accelerate software development and documentation.
  • Collaborate with cross-functional teams on feature definition and roadmaps.

Skills

Python
C++
SystemVerilog
Analytical thinking
Communication
AI coding assistants

Education

Bachelor's, Master's, or PhD in Electrical Engineering, Computer Engineering, or Computer Science

Tools

Ramulator
DRAMSim
gem5

Job description

Micron Technology, Inc. in California is seeking a Memory Systems Architecture Intern to contribute to the architecture and microarchitecture development of next‑gen HBM products for AI, HPC, and data centers.

You will work with experienced architects to evaluate features, build performance models in Python and C++, and help define roadmaps while applying sound engineering judgment. Strong fundamentals in computer architecture and memory systems, plus hands‑on coding, are required; prior

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