FPGA Verification Engineer II- Space Systems, Stock Options

Airbus Ventures

Westminster (CO)

Híbrido

USD 113.000 - 136.000

Jornada completa

14 días+

Una candidatura completa en un minuto

Currículum y carta de presentación personalizados, listos para enviar.

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Ventajas ofrecidas por este puesto de trabajo

Stock options
Health insurance
Dental and vision

Descripción de la vacante

CesiumAstro is hiring an FPGA Verification Engineer II to join a hands-on, cross-functional team developing verification methods for space-grade hardware. You will build UVMf testbenches, reusable VIP modules, and DPI-C dataplane interfaces, while mentoring junior staff on advanced verification techniques.

Ideal candidates have 2+ years in verification, strong SystemVerilog/VHDL, and experience with Xilinx tools in a Linux environment.

Formación

  • A BS or MS in CS/EE/CE is required.
  • Minimum of 2 years in verification and automation.
  • Strong knowledge of FPGA verification and digital design methods.
  • Familiarity with CI, regression testing, and HIL testing.
  • Proficiency with Linux and vendor FPGA tools.

Responsabilidades

  • Develop UVMf-based top and module-level testbenches with reusable VIP modules.
  • Contribute to FPGA/digital design verification, simulation, and emulation infra.
  • Lead CI/regression testing infrastructure for ongoing verification.
  • Mentor engineers on UVMf testbenchs and DPI-C interfaces with MATLAB/Python models.
  • Collaborate with vendors and leadership to drive process improvements.

Conocimientos

VHDL
Verilog
SystemVerilog
UVM/UVMf
DPI-C
TLM
C/C++
QEMU
VIP
Python
MATLAB

Educación

BS or MS in Computer Science, Electrical Engineering, or Computer Engineering

Herramientas

Xilinx tools
Xilinx Vivado

Descripción del empleo

CesiumAstro is hiring an FPGA Verification Engineer II to join a hands-on, cross-functional team developing verification methods for space-grade hardware. You will build UVMf testbenches, reusable VIP modules, and DPI-C dataplane interfaces, while mentoring junior staff on advanced verification techniques.

Ideal candidates have 2+ years in verification, strong SystemVerilog/VHDL, and experience with Xilinx tools in a Linux environment.

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