FPGA Engineer II — Space Hardware & Stock Options

Cesiumastro

Westminster (CO)

On-site

USD 113,000 - 136,000

Full time

14 days+

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Benefits offered by this job

Stock options
Health insurance
Dental insurance
Vision insurance
HSA
FSA
Life insurance
Disability insurance
Retirement plan

Job summary

CesiumAstro is seeking an FPGA Engineer II to contribute to FPGA circuits and systems for satellites and aerospace platforms. You will work in a startup‑style, hands‑on environment, collaborating across hardware and software teams to deliver robust HDL designs.

The ideal candidate has 2+ years of industry experience in FPGA design and verification (Verilog/VHDL) and is comfortable with high‑speed interfaces, multiple clock domains, and lab testing. Excellent communication skills are essential.

Qualifications

  • BS/ MS in Electrical Engineering or Computer Engineering from an accredited university.
  • Minimum of 2 years of industry experience in FPGA design/HDL at the HDL level.
  • Expertise in FPGA design and verification (Verilog/VHDL, HDL coder, Xilinx Vivado, ModelSim).
  • Hands-on experience with lab instruments such as digital oscilloscopes, spectrum analyzers, RF signal generators, and vector signal analyzers.
  • Excellent written and verbal communication skills.

Responsibilities

  • Develop FPGA circuits and systems through all phases of the development process.
  • HDL design and verification (Verilog/VHDL) with related tools and testbenches.
  • Perform testing, validation, and verification for FPGA implementations.
  • Desirable: experience in digital signal processing or board-level hardware design.

Skills

FPGA design
Verilog/VHDL
Xilinx Vivado
ModelSim
HDL verification
Lab instruments
Written and verbal communication

Education

BS/MS in Electrical Engineering or Computer Engineering

Tools

Oscilloscopes
Spectrum analyzers
RF signal generators
Vector signal analyzers

Job description

CesiumAstro is seeking an FPGA Engineer II to contribute to FPGA circuits and systems for satellites and aerospace platforms. You will work in a startup‑style, hands‑on environment, collaborating across hardware and software teams to deliver robust HDL designs.

The ideal candidate has 2+ years of industry experience in FPGA design and verification (Verilog/VHDL) and is comfortable with high‑speed interfaces, multiple clock domains, and lab testing. Excellent communication skills are essential.

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