Space Tech FPGA Verification Engineer II

Airbus Ventures; Austin, Northern (TX, KY); Hybrid; USD 110,000 - 150,000; Full time

Benefits offered by this job

Stock options

Health, dental, vision

HSA

FSA

Life insurance

Disability insurance

Retirement plan

Job summary

CesiumAstro seeks a passionate FPGA Verification Engineer II to advance verification and testbench development for space-grade FPGA/digital designs. The role emphasizes training and mentoring engineers across experience levels while collaborating with senior leadership on process improvements.

Ideal candidates bring hands-on experience in FPGA verification, SystemVerilog, and DPI-C integration, with a strong background in CI/regression testing and Linux environments.

Qualifications

• BS or MS in Computer Science, Electrical Engineering, or Computer Engineering.
• Minimum 2 years of industry experience in verification and automation.
• Knowledge of FPGA verification techniques including VHDL, Verilog, SystemVerilog, C/C++, SystemC, UVM/UVMf, DPI-C, TLM, Formal CDC and functional analysis, QEMU and VIP.
• Understanding CI, regression testing and HIL testing.
• Competency with Linux and vendor FPGA development tools focusing on Xilinx.

Responsibilities

• Contribute to evaluation and technical implementation of FPGA and digital design simulation, verification and emulation infrastructure.
• Contribute to CI and regression testing infrastructure development, maintenance, and deployment.
• Develop state-of-the-art UVMf-based top-level and module-level testbenches for reusability, including DPI-C integration with MATLAB and Python models.
• Lead development of reusable custom VIP modules.
• Mentor engineers on UVMf testbench usage and modern FPGA/digital design approaches.

Skills

VHDL/Verilog

SystemVerilog

UVM/UVMf

C/C++

Linux

CI/Regression testing

DPI-C

Education

BS/MS in CS/EE/CE

Tools

Xilinx tools

MATLAB

Python

VIP

QEMU

Job description

CesiumAstro seeks a passionate FPGA Verification Engineer II to advance verification and testbench development for space-grade FPGA/digital designs. The role emphasizes training and mentoring engineers across experience levels while collaborating with senior leadership on process improvements.

Ideal candidates bring hands-on experience in FPGA verification, SystemVerilog, and DPI-C integration, with a strong background in CI/regression testing and Linux environments.