Space-Grade FPGA Verification Engineer II

Roman Health Pharmacy LLC

Westminster (CO)

On-site

USD 113,000 - 136,000

Full time

6 days ago
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Benefits offered by this job

Stock options
Comprehensive benefits

Job summary

CesiumAstro is seeking an FPGA Verification Engineer II to advance our FPGA design verification and testbench capabilities. You will contribute to simulation, verification, and emulation infrastructure, and lead reusable VIP modules while mentoring engineers across experience levels.

The role requires 2+ years in verification, strong VHDL/Verilog/SystemVerilog skills, and experience with CI, DPI-C, and Xilinx tools. A BS/MS in CS/EE is expected, with US-based employment consideration.

Qualifications

  • Degree in Computer Science, Electrical Engineering, or Computer Engineering.
  • 2+ years in verification/automation.
  • Experience with FPGA design verification techniques (VHDL/Verilog/SystemVerilog).
  • Familiarity with CI, regression testing, and HIL testing.

Responsibilities

  • Evaluate and implement FPGA verification and emulation infrastructure.
  • Develop CI/regression testing infrastructure and tooling.
  • Build reusable UVMf testbenches for control and data plane with DPI-C integration.
  • Mentor engineers on UVMf usage and modern FPGA design practices.
  • Collaborate with vendors to define model deliverables and requirements.
  • Keep up-to-date with industry best practices in FPGA design methodologies.
  • Support leadership in process improvements without disruption.

Skills

UVM/UVMf
Verilog/VHDL
C/C++
Linux
CI/Regression testing
Python/MATLAB
Xilinx tools

Education

BS/MS in CS/EE

Tools

Xilinx tools
VIP
DPI-C
QEMU

Job description

CesiumAstro is seeking an FPGA Verification Engineer II to advance our FPGA design verification and testbench capabilities. You will contribute to simulation, verification, and emulation infrastructure, and lead reusable VIP modules while mentoring engineers across experience levels.

The role requires 2+ years in verification, strong VHDL/Verilog/SystemVerilog skills, and experience with CI, DPI-C, and Xilinx tools. A BS/MS in CS/EE is expected, with US-based employment consideration.

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