First-Silicon Design Verification Engineer

Apple, Inc.; Beaverton (OR); On-site; USD 120,000 - 180,000; Full time

Job summary

Apple, Inc. is seeking a design verification engineer to drive pre-silicon verification for IP and SoC designs. You will establish DV methodology, build verification environments, write tests, debug, and drive coverage to sign-off RTL for tape-out across IP blocks.

The role emphasizes regression, test-plan development, and scalable, portable verification environments with LLM-enabled efficiency and quality improvements.

Qualifications

• BS degree in a technical subject and a minimum of 3 years relevant industry experience.
• MS degree in a technical subject area strongly preferred; relevant industry experience is valued.
• Strong knowledge of OOP, SystemVerilog, UVM; experience with scalable/testbenches and verification methodologies.

Responsibilities

• Study design specification and create test plan
• Develop infrastructure in SystemVerilog/UVM to stress the design
• Develop and fix failures from regressions, close bugs
• Use LLMs to do verification efficiently

Skills

OOP

Testbench design

Verification methodologies

LLMs

Education

Bachelor's degree in technical field

Master's degree in technical field

Tools

SystemVerilog

UVM

Python

Perl

TCL

UPF

PCIe

USB

DDR

Job description

Apple, Inc. is seeking a design verification engineer to drive pre-silicon verification for IP and SoC designs. You will establish DV methodology, build verification environments, write tests, debug, and drive coverage to sign-off RTL for tape-out across IP blocks.

The role emphasizes regression, test-plan development, and scalable, portable verification environments with LLM-enabled efficiency and quality improvements.