Emulation Test Engineer – Remote-First & Equity Options

Positron; Austin (TX); On-site; USD 180,000 - 300,000; Full time

Benefits offered by this job

Medical insurance

Dental insurance

Vision insurance

Life and disability insurance

401(k) with company matching

Unlimited PTO

13 paid holidays

Remote-first culture

Home office setup

Job summary

Positron AI seeks an Emulation Test Engineer to define and own the end-to-end emulation strategy on Cadence Palladium. You will architect complex model builds, manage multi-rack partitioning, and drive software left-shift for early firmware bring-up across RTL, DV, and Software teams.

You will enable high-performance virtual environments, verify silicon readiness, and resolve hardware-software bottlenecks at scale, including PCIe Gen6/7 and 112G+VSR interfaces.

Qualifications

• Extensive Palladium experience with multi-rack partitioning and emulation.
• Proficient in Python, Tcl, Bash for automation and nightly regressions.
• Strong SystemVerilog/Verilog/C/C++ for transactor development.
• Deep understanding of PCIe, DDR, and AMBA/NoC protocols.
• Experience debugging firmware/kernel with Verdi/SimVision.

Responsibilities

• Lead emulation architecture across a multi-rack Palladium setup.
• Develop left-shifted software environments for OS boot on pre-silicon hardware.
• Validate high-speed interfaces and AI memory hierarchies end-to-end.
• Perform dynamic power and throughput analysis to locate bottlenecks.
• Coordinate with Cadence R&D to optimize tools and workflows.

Skills

Cadence Palladium (Z1/Z2/Z3)

Python

Tcl

Bash

SystemVerilog

Verilog

C/C++

PCIe

DDR

AMBA AXI/NoC

Verdi

SimVision

Education

BS/MS in Electrical Engineering, Computer Engineering, or Computer Science

Tools

Cadence Palladium (Z1/Z2/Z3)

SCE-MI

DPI

Verdi

SimVision

Job description

Positron AI seeks an Emulation Test Engineer to define and own the end-to-end emulation strategy on Cadence Palladium. You will architect complex model builds, manage multi-rack partitioning, and drive software left-shift for early firmware bring-up across RTL, DV, and Software teams.

You will enable high-performance virtual environments, verify silicon readiness, and resolve hardware-software bottlenecks at scale, including PCIe Gen6/7 and 112G+VSR interfaces.