Senior ASIC Emulation Engineer — Lead Pre-Silicon Platforms

K2 Space; Seattle (WA); On-site; USD 170,000 - 250,000; Full time

Benefits offered by this job

Equity

Medical/dental/vision insurance

Paid time off

Parental leave

Job summary

K2 Space is seeking a Senior ASIC Emulation Engineer to lead bring-up and optimization of pre-silicon emulation platforms. You will collaborate with architecture, RTL, DV, firmware, and physical design teams to enable high‑fidelity hardware/software co-development and accelerate verification cycles.

This is a hands‑on role with ownership over emulation strategy and workflows. You will work with Palladium/ZeBu/Veloce platforms, build robust emulation capabilities, and support system-level testing

Qualifications

• B.S./M.S. in Electrical Engineering or related field.
• 5+ years of experience in ASIC/SoC development, focused on emulation.
• Strong knowledge of SystemVerilog, digital logic, RTL flows, DV methodologies, and lifecycle.
• Hands-on expertise with emulation platforms (Palladium, ZeBu, Veloce).
• Proficiency with scripting languages (Python, Perl, TCL) for automation and tooling.
• Experience with hardware/software interfaces, embedded processors, firmware bring-up, and C/C++-based system-level testing.
• Familiarity with APB/AHB/AXI, JTAG, SPI buses.
• Experience driving cross-functional debug involving RTL, DV, firmware, physical design, and validation.
• Understanding of pre- and post-silicon debug methodologies.

Responsibilities

• Build, integrate, and maintain full-chip, multi-chip and system-level emulation models.
• Define and evolve emulation strategy, methodology, and workflows.
• Work with RTL engineers to compile, map, and optimize designs for emulation performance.
• Develop and integrate transactors, BFMs, speed adapters, and virtualization interfaces.
• Support system-level testing in emulation with HW/SW integration.
• Accelerate verification throughput by running high-value tests in emulation.
• Enable firmware, bootloader, driver, and software teams by providing emulation platforms.
• Run emulation workloads, triage failures, and perform root-cause analysis.
• Maintain automation for compile flows, regression management, and CI.
• Participate in architecture reviews, microarchitecture discussions, and emulation best practices.
• Support silicon bring-up and post-silicon validation through test reuse and diagnostics.

Skills

SystemVerilog

RTL design

DV methodologies

Python scripting

C/C++ testing

Bus protocols (PCIe/Ethernet)

Cross-functional collaboration

Education

B.S./M.S. in Electrical Engineering

Tools

Palladium

ZeBu

Veloce

Job description

K2 Space is seeking a Senior ASIC Emulation Engineer to lead bring-up and optimization of pre-silicon emulation platforms. You will collaborate with architecture, RTL, DV, firmware, and physical design teams to enable high‑fidelity hardware/software co-development and accelerate verification cycles.

This is a hands‑on role with ownership over emulation strategy and workflows. You will work with Palladium/ZeBu/Veloce platforms, build robust emulation capabilities, and support system-level testing