Emulation Engineer

Maayee, Inc.; Suwanee (GA); On-site; USD 120,000 - 190,000; Full time

Job summary

Maayee, Inc. in Suwanee, GA is seeking a seasoned hardware emulation engineer to set up and maintain Siemens Veloce emulation and prototyping platforms, adapt SoC designs for emulation, and develop testbenches.

You will collaborate with design and verification teams to accelerate debugging and bring up software support tools. Requirements include 5–10 years of experience with emulation platforms (Veloce, Palladium, ZeBu), PCIe/UCIe, memory tech (LPDDR/HBM), RTL (Verilog/SystemVerilog), and

Qualifications

• Experience with emulation platforms such as Veloce, Palladium or ZeBu.
• Proficiency with high-speed I/O interfaces (PCIe, UCIe) and memory technologies (LPDDR, HBM).
• Strong digital design background; RTL (Verilog/SystemVerilog) and SoC concepts.
• Prototyping experience and hardware debugging with waveform viewers and analyzers.
• Scripting skills (Python, Tcl, Perl) for automation and infra development.
• UVM/systemVerilog verification experience is a plus; C/C++ development is a plus.

Responsibilities

• Set up and maintain emulation and prototyping platforms.
• Adapt SoC designs for emulation and prototyping environments.
• Develop and debug emulation testbenches and system-level test environments.
• Support pre-silicon validation and power/performance analysis.
• Collaborate with design/verification teams to isolate issues and speed up debugging.
• Optimize emulation performance and reduce turnaround time.
• Collaborate with firmware/software teams to enable OS/driver testing on emulators.

Skills

Emulation platforms

HDL design

C/C++ programming

RTL SoC architecture

Tools

Veloce

Palladium

ZeBu

ProFPGA

HAPS

Protium

Job description

Key Skills: Veloce, Palladium, or ZeBu, PCIe and UCIe and Memory technologies such as LPDDR and HBM

Job Description

• Set up and maintain Siemens Veloce emulation and prototyping platforms.
• Adapt SoC designs for Emulation and Prototyping.
• Develop and debug emulation testbenches and system-level environments.
• Support pre-silicon validation, power/performance analysis, and early software bring-up.
• Participate in silicon bring-up and validation.
• Collaborate with design and verification teams to isolate design issues and accelerate debug.
• Optimize performance of the emulation workloads and reduce turnaround time.
• Work with firmware/software teams to enable use of emulators for OS and driver testing.

5 to 10 years of experience.

• Experience with emulation platforms (Veloce, Palladium, or ZeBu) and FPGA-based prototyping systems (pro FPGA, HAPS, or Protium).
• Experience with emulating high speed I/O interfaces such as PCIe and UCIe and memory technologies such as LPDDR and HBM.
• Solid understanding of digital design, RTL (Verilog/System Verilog), and SoC architecture.
• Proficiency in hardware debug tools, waveform viewers, and logic analyzers.
• Scripting skills (e.g., Python, Tcl, Perl) for automation and infrastructure Development.
• Familiarity with UVM, simulation, and testbench environments. System Verilog and UVM-based verification experience a plus.
• Hand-on software development experience with C/C++ is a plus.