Silicon Validation/Emulation Design Engineer

Socket.dev; Sunnyvale (CA); On-site; USD 150,000 - 230,000; Full time

Job summary

Socket.dev seeks a Silicon Validation/Emulation Design Engineer to lead pre-silicon hardware validation for Wireless SoCs with custom accelerators. You will work with ARM-based subsystems, RTL and verification teams to validate designs before tape-out, while shaping emulation processes, flows, and debug tools for efficient platform bring-up and milestone support.

The role emphasizes cross-functional collaboration, advanced debugging across system and IP levels, and the development of automation

Qualifications

• BS and a minimum of 10 years relevant industry experience.

Responsibilities

• Build and maintain Palladium emulation environments, including compile flows, netlist preparation, memory modeling, and clock/reset configurations.
• System-level debug and root cause analysis of complex hardware issues on the emulation platform.
• IP-level debug and validation, working closely with IP owners to isolate and resolve design issues.
• Development and implementation of automation aids, flows, and scripts to improve Palladium build efficiency, debug turnaround, and platform utilization.
• Performance profiling and optimization of emulation models to maximize execution speed.
• Collaboration with multi-disciplinary groups to ensure emulation deliverables are on schedule and support critical program milestones.

Skills

Cadence Palladium

Synopsys ZeBu

Python scripting

Tcl scripting

ARM-based subsystems

Debug tools

Education

Bachelor's degree

Tools

Cadence Palladium

Synopsys ZeBu

Job description

As a Silicon Validation/Emulation Design Engineer, you will work in a team developing Wireless SoCs with custom hardware accelerators, as well as multiple ARM-based sub-systems. You will be a key contributor in our pre-silicon hardware validation efforts using Cadence Palladium emulation platforms, enabling early system integration and hardware validation. You will work closely with SoC architects, RTL designers, and verification engineers to ensure our designs are thoroughly validated before tape-out. You will help define the processes, methods, and tools for emulation environment development and debug of large complex SoCs.If you enjoy a fast-paced and ambitious environment, collaborating with people across different functional areas, and thriving during crisis times,

Description

• Building and maintaining Palladium emulation environments, including compile flows, netlist preparation, memory modeling, and clock/reset configurations.
• System-level debug and root cause analysis of complex hardware issues on the emulation platform.
• IP-level debug and validation, working closely with IP owners to isolate and resolve design issues.
• Development and implementation of automation aids, flows, and scripts to improve Palladium build efficiency, debug turnaround, and platform utilization.
• Performance profiling and optimization of emulation models to maximize execution speed.
• Collaboration with multi-disciplinary groups to make sure emulation deliverables are on schedule and support critical program milestones.

Minimum Qualifications

• BS and a minimum of 10 years relevant industry experience

Preferred Qualifications

• Proven experience with Cadence Palladium (or equivalent emulation platforms such as Synopsys ZeBu), including build flows, compile optimization, and platform bring-upStrong debugging skills with experience in system-level and IP-level debug on emulation platformsExperience with emulation compile flows, including synthesis for emulation, memory compilation, clock modeling, and I/O abstractionProficiency in debug tools and methodologies (waveform analysis, signal probing, assertion-based debug, transactors)Solid understanding of RTL design concepts, SoC architectures, ARM-based subsystems, and standard bus protocols (AXI, AHB, APB)Experience developing and maintaining automation scripts (Python, Tcl, Perl, Shell) to streamline emulation workflowsStrong analytical and problem-solving skills with ability to debug complex system-level issuesExperience with Wireless SoC applications (Wi-Fi, Bluetooth, cellular) - strongly preferredExcellent communication and collaboration skills to work effectively across functional teamsExperience with version control systems (Git, Perforce) and CI/CD integration for emulation flows