Director, SoC Architecture & Tapeout

OHO Group (Lithuania); San Francisco (CA); On-site; USD 180,000 - 320,000; Full time

Job summary

Technical Director – Stealth AI Silicon Startup in the Bay Area is seeking a director-level engineer to own architecture and end-to-end design of critical SoC subsystems. You will work with RTL, microarchitecture, verification and physical design teams while shaping the technical direction of the silicon.

You’ll mentor engineers, establish engineering standards, and build out a high-caliber hardware team as the company scales, maintaining hands-on technical leadership in a fast-paced,

Qualifications

• Experience leading SoC or ASIC architecture and tapeouts.
• Strong leadership and mentorship skills across hardware teams.
• Hands-on technical ownership in early-stage semiconductor environments.

Responsibilities

• Own the architecture and end-to-end design of a critical SoC subsystem
• Work closely with RTL, microarchitecture, verification and physical design teams
• Drive technical direction, engineering standards and design methodologies
• Mentor engineers and help build out a high-calibre hardware team
• Take ownership across the full chip development lifecycle, from architecture through to tapeout
• Proven experience leading complex ASIC/SoC development across multiple successful tapeouts
• Strong background in memory, compute, interconnect or other complex SoC subsystems
• Comfortable operating in an early-stage environment with significant technical ownership
• Whether you've helped build a semiconductor startup from an early stage or are looking to take a step beyond one of the larger semiconductor companies, this is an opportunity to have significant influence over both the technology and the team.

Skills

SoC architecture

Team leadership

ASIC/SoC development

Mentoring

Job description

Technical Director – Stealth AI Silicon Startup in the Bay Area is seeking a director-level engineer to own architecture and end-to-end design of critical SoC subsystems. You will work with RTL, microarchitecture, verification and physical design teams while shaping the technical direction of the silicon.

You’ll mentor engineers, establish engineering standards, and build out a high-caliber hardware team as the company scales, maintaining hands-on technical leadership in a fast-paced,