Director, SoC Design Engineering & AI Leadership

GlobalFoundries inc.; Texas; On-site; USD 191,000 - 332,000; Full time

Job summary

GlobalFoundries in Richardson/Austin, TX seeks a Director of Design Engineering to lead complex SoC programs from concept to tape-out. You will drive architectural execution, front-end design, and cross-functional collaboration across architecture, verification, DFT, and packaging teams.

Your leadership will develop teams across geographies, advance PPA-focused design methodologies, and partner with foundries to ensure silicon success on future nodes.

Qualifications

• 15+ years of semiconductor design experience with progressive technical and leadership responsibility.
• 8+ years of engineering management experience leading senior technical teams.
• Proven track record of delivering multiple ASIC/SoC tape-outs across advanced technology nodes.
• Strong hands-on front-end design, RTL, synthesis, timing, DFT and test methodologies.
• Deep RTL-to-GDSII development flow understanding and collaboration on large-scale SoCs.

Responsibilities

• Lead the design and execution of complex SoC, AI/ML, networking, compute, or edge-processing products.
• Drive front-end development from architecture definition through RTL implementation and tape-out readiness.
• Establish and enforce best-in-class design methodologies, metrics, and execution frameworks.
• Build, mentor, and lead design teams across multiple disciplines and geographies.
• Collaborate with Architecture, Verification, DFT, Physical Design, Packaging, Software, Foundry and Ops teams.

Skills

Front-end design

RTL design

Synthesis

Timing closure

DFT & test

Verification

IP integration

Leadership

Education

Bachelor's/Master's/PhD in Electrical Engineering

Tools

GDSII

EDA tools

Job description

GlobalFoundries in Richardson/Austin, TX seeks a Director of Design Engineering to lead complex SoC programs from concept to tape-out. You will drive architectural execution, front-end design, and cross-functional collaboration across architecture, verification, DFT, and packaging teams.

Your leadership will develop teams across geographies, advance PPA-focused design methodologies, and partner with foundries to ensure silicon success on future nodes.