Director of Hardware Engineering – High-Speed IP & RTL

Baya Systems; Santa Clara (CA); In loco; USD 220.000 - 320.000; Tempo pieno

Vantaggi offerti da questo lavoro

Equity

Performance incentives

Onsite advantage at Santa Clara

Descrizione del lavoro

Baya Systems is seeking a Manager/Director of Hardware Engineering in Santa Clara, onsite only. You will lead a first-level team of RTL microarchitects and DV engineers, owning end-to-end interconnect IP from design to tape-out.

Requirements include 8+ years in ASIC/IP development with 2–3 years in leadership, strong SystemVerilog/Verilog skills, and expertise in high-speed protocols like PCIe/UCIe/CXL/Ethernet. A startup mindset and collaboration across disciplines are essential.

Competenze

• Requires 8+ years in ASIC/IP development with leadership experience.
• Strong background in PCIe, UCIe, CXL, Ethernet, or SerDes.
• Proficiency in SystemVerilog/Verilog and industry-standard verification flows (UVM/OVM).
• Startup mindset with proven delivery in fast-paced environments.

Mansioni

• Lead and mentor a team of 8–12 RTL and DV engineers.
• Drive IP interconnect development from microarchitecture to tape-out.
• Oversee verification test plans, coverage, and emission of high-quality silicon blocks.
• Collaborate across architecture, physical design, and system teams to meet PPA targets.
• Establish metrics, methodologies, and agile practices to hit tape-out milestones.

Conoscenze

Leadership

ASIC/IP development

High-speed protocols

SystemVerilog

Verilog

UVM/OVM

Constrained random testing

Formal verification

Coverage analysis

Formazione

B.S./M.S. in Electrical or Computer Engineering

Descrizione del lavoro

Baya Systems is seeking a Manager/Director of Hardware Engineering in Santa Clara, onsite only. You will lead a first-level team of RTL microarchitects and DV engineers, owning end-to-end interconnect IP from design to tape-out.

Requirements include 8+ years in ASIC/IP development with 2–3 years in leadership, strong SystemVerilog/Verilog skills, and expertise in high-speed protocols like PCIe/UCIe/CXL/Ethernet. A startup mindset and collaboration across disciplines are essential.