Director of Verification IP: PCIe/USB/Ethernet Leader

Siemens EDA (Siemens Digital Industries Software); Fremont (CA); Hybrid; USD 180,000 - 250,000; Full time

Benefits offered by this job

Hybrid work by default

Global mobility

Industry leader benefits

Job summary

Siemens EDA, part of Siemens Digital Industries Software, seeks an Engineering Director - Verification IP to lead development of verification IP for PCIe Gen5/Gen6, USB3.2, 400GigE, DDR5, LPDDR5 and CXL for Questa RTL. Based in Austin, TX, you will guide a global team and collaborate with customers worldwide to resolve verification challenges.

You will drive strategy, architecture, and roadmaps, while mentoring engineers to ensure high-quality, scalable verification solutions and ongoing product

Qualifications

• Bachelor's degree in Electronics, Computer Engineering, or related field; advanced degree preferred.
• 18+ years of IP/VIP development, verification, or emulation with leadership.
• Expert-level SystemVerilog and UVM; architect and implement complex verification frameworks.
• Hands-on with assertions, coverage metrics, test planning, and debug methodologies.
• Knowledge of PCIe, CXL, USB, Ethernet, DDR, or CHI with coherent architectures.
• Proven leadership managing technical teams and mentoring engineers.

Responsibilities

• Lead and mentor a high-performing team of verification engineers, fostering a culture of innovation and technical excellence.
• Direct the architecture, design, and development of comprehensive verification IP solutions for advanced interfaces and protocols.
• Collaborate with field engineers and customer teams to understand requirements, deploy solutions, and resolve complex technical issues.
• Drive technical strategy and roadmap decisions for verification IP products, balancing customer needs with product vision.
• Ensure quality standards through comprehensive testing, coverage analysis, and continuous improvement of verification methodologies.
• Partner with cross-functional teams globally to integrate verification solutions with Questa RTL simulation and other Siemens tools.

Skills

SystemVerilog

UVM

Verification leadership

Test planning

Assertions

Coverage metrics

Debug methodologies

Verification tracking tools

Education

Bachelor's degree in Electronics or Computer Engineering

Advanced degree preferred

Tools

Questa RTL

Job description

Siemens EDA, part of Siemens Digital Industries Software, seeks an Engineering Director - Verification IP to lead development of verification IP for PCIe Gen5/Gen6, USB3.2, 400GigE, DDR5, LPDDR5 and CXL for Questa RTL. Based in Austin, TX, you will guide a global team and collaborate with customers worldwide to resolve verification challenges.

You will drive strategy, architecture, and roadmaps, while mentoring engineers to ensure high-quality, scalable verification solutions and ongoing product