Director, 3D-Stacked DRAM Logic & IP Design

Socket.dev; San Jose (CA); On-site; USD 250,000 - 300,000; Full time

Benefits offered by this job

Health insurance

401k Matching

Paid time off

Parental Leave

Education reimbursement

Job summary

SK hynix America in San Jose seeks a Director of 3D Stacked Logic Design to lead high-speed digital IP development for 3D-stacked DRAM and DFT. You will guide RTL design, verification with U.S.-based customers, and build IP infrastructure to enable DRAM-on-Logic configurations.

You will manage foundry verification, drive IP services, and collaborate with cross-functional teams to strengthen market leadership in memory technology.

Qualifications

• Bachelor's degree or higher in Electrical Engineering or related field.
• Experience in RTL design and implementation for memory-related IP.
• 8+ years in digital IP design, RTL, or memory-related projects.
• Strong English communication skills.

Responsibilities

• Lead design of high-speed digital IP for 3D-stacked DRAM with U.S. customers.
• Drive foundry verification and infrastructure setup for IP business.
• Ensure seamless IP integration in customer design environments.
• Strengthen DRAM-on-Logic leadership through advanced digital IP design.
• Co-design 3D-stacked DRAM logic die with U.S.-based customers.

Skills

RTL design

Verilog

VHDL

Memory controller

DFT/DFD

PPA analysis

English communication

Education

Bachelor’s degree in Electrical Engineering

Job description

SK hynix America in San Jose seeks a Director of 3D Stacked Logic Design to lead high-speed digital IP development for 3D-stacked DRAM and DFT. You will guide RTL design, verification with U.S.-based customers, and build IP infrastructure to enable DRAM-on-Logic configurations.

You will manage foundry verification, drive IP services, and collaborate with cross-functional teams to strengthen market leadership in memory technology.