HBM Logic Architect

SK hynix America

San Jose (CA)

On-site

USD 150,000 - 320,000

Full time

14 days+

Get more replies from employers

Send a job-specific resume in minutes.

Benefits offered by this job

Health insurance
PTO & holidays
Parental leave
401k match
Education reimbursement
Donation matching
Corporate discounts
Free meals

Job summary

SK hynix America is seeking a HBM Logic Architect in San Jose, CA. The role focuses on close technical engagement with US customers to tackle base-die architectural challenges in HBM and 3D-stacked DRAM, and to build a dedicated HBM Architect Design team in the US.

You will develop advanced HBM architectures for future products and strengthen competitiveness through leadership and collaboration with customer teams in the United States.

Qualifications

  • Bachelor's degree or higher in Electrical Engineering or related field; Master's preferred.
  • 5+ years in semiconductor, ASIC/SoC, memory, or PHY design.
  • High-speed digital PHY or high-speed IP design and analysis.
  • DRAM memory controller design and analysis.
  • DRAM DFT/DFD architecture, design, or analysis.
  • PHY/TSV bit macro design, TSV PHY hard macro design, or 3D PHY design.
  • Experience in PPA optimization is preferred.

Responsibilities

  • Define, design, and validate digital IP for ASIC/SoC products.
  • RTL design and implementation based on specs.
  • Collaborate with cross-functional teams to define IP functionality and architecture.
  • Evaluate architecture options based on PPA targets.
  • Develop and verify RTL designs using industry-standard methods.
  • Provide design guidance and support for physical design implementation.
  • Strengthen digital IP design capabilities for HBM and DRAM development; secure personnel near customer sites.
  • Drive system-level co-optimization beyond standalone DRAM design.
  • Build partnerships with U.S.-based customers and improve competitiveness.

Skills

HBM architecture
RTL design
DRAM memory controller
3D-Stacked DRAM
PPA optimization

Education

Bachelor's degree in Electrical Engineering or related (Master's preferred)

Job description

Job Title: HBM Logic Architect

Office Location: San Jose, CA

Job Type: Full-Time

Work Model: Onsite

About SK hynix America

At SK hynix America, we're at the forefront of semiconductor innovation, developing advanced memory solutions that power everything from smartphones to data centers. As a global leader in DRAM and NAND flash technologies, we drive the evolution of advancing mobile technology, empowering cloud computing, and pioneering future technologies. Our cutting-edge memory technologies are essential in today's most advanced electronic devices and IT infrastructure, enabling enhanced performance and user experiences across the digital landscape.

We're looking for innovative minds to join our mission of shaping the future of technology. At SK hynix America, you'll be part of a team that's pioneering breakthrough memory solutions while maintaining a strong commitment to sustainability. We're not just adapting to technological change - we're driving it, with significant investments in artificial intelligence, machine learning, and eco-friendly solutions and operational practices. As we continue to expand our market presence and push the boundaries of what's possible in semiconductor technology, we invite you to be part of our journey to creating the next generation of memory solutions that will define the future of computing.

Job Summary

This role involves establishing close technical engagement with key US-based customers to address immediate base-die architectural challenges in HBM and 3D-stacked DRAM. You will be responsible for building a compact and focused HBM Architect Design team in the US to directly support these critical customer interactions. The position also requires developing advanced and customized HBM architectures for future products while strengthening competitiveness through sustained collaboration and technical leadership.

Responsibilities
  • Define, design, and validate digital IP for ASIC/SoC products.
  • Perform RTL design and implementation based on approved specifications.
  • Collaborate with cross-functional teams to define IP functionality, behavior, and architecture.
  • Review digital IP requirements and evaluate architecture options based on PPA targets.
  • Determine or contribute to architecture decisions for digital IP implementation.
  • Develop and verify RTL designs using industry-standard design methodologies.
  • Provide design guidance and support for physical design implementation.
  • Strengthen digital IP design capabilities for HBM and next-generation DRAM development by securing personnel for real-time support near customer sites.
  • Drive system-level co-optimization beyond standalone DRAM design.
  • Build deep technical partnerships with U.S.-based customers.
  • Improve competitiveness through close engagement with customers in the U.S.
Qualifications
  • Bachelor's degree or higher in Electrical Engineering or a related discipline(Master's preferred).
  • 5+ years of relevant experience in semiconductor, ASIC/SoC, digital IP, memory, or PHY design.
  • High-speed digital PHY or high-speed IP design and analysis
  • DRAM memory controller design and analysis
  • DRAM DFT/DFD architecture, design, or analysis
  • PHY/TSV bit macro design, TSV PHY hard macro design, or 3D PHY design
  • Experience in PPA (Power, Performance, Area) optimization, preferred.
Benefits
  • Top Tier health insurance at no employee cost
  • Paid day offs: PTO + Company Holidays + Happy Fridays
  • Paid Parental Leave Program
  • 401k Matching
  • Educational reimbursement up to $10,000 per year for job-related higher education degree
  • Donation Matching and volunteering opportunities
  • Corporate discount programs
  • Free Breakfast/Lunch/Dinner provided to employees
Equal Employment Opportunity

SKHYA is an Equal Employment Opportunity Employer. We provide equal employment opportunities to all qualified applicants and employees and prohibit discrimination and harassment of any type without regard to race, sex, pregnancy, sexual orientation, religion, age, gender identity, national origin, color, protected veteran or disability status, genetic information or any other status protected under federal, state, or local applicable laws.

Compensation

Our compensation reflects the cost of labor across several U.S. geographic markets, and we pay differently based on those defined markets. Pay within the provided range varies by work location and may also depend on job-related skills and experience. Your Recruiter can share more about the specific salary range for the job location during the hiring process.

Pay Range

$150,000 - $320,000 USD

Get your free, confidential resume review.
or drag and drop your file here.
Similar jobs

Similar jobs worth comparing

HBM Logic Architect
HBM Logic Architect

SK hynix America • San Jose (CA)

On-site
USD 150,000 - 260,000
Top Tier health insurance
PTO + Holidays + Happy Fridays
Parental Leave Program
+5
HBM Architect
HBM Architect

SK hynix America • San Jose (CA)

On-site
USD 150,000 - 320,000
Top Tier health insurance
Paid time off & company holidays
401k Matching
+4
HBM Architect
HBM Architect

SK hynix America • San Jose (CA)

On-site
USD 150,000 - 260,000
Health insurance
PTO and holidays
Parental leave
+3
Principal Engineer, HBM Field Application
Principal Engineer, HBM Field Application

SK hynix America • San Jose (CA)

On-site
USD 190,000 - 230,000
Top-tier health insurance
401k matching
Paid time off & holidays
+4
On/Off-Chip SI/PI Engineer
On/Off-Chip SI/PI Engineer

Socket.dev • San Jose (CA)

On-site
USD 150,000 - 320,000
Health insurance
PTO + holidays
Parental leave
+5
Technical Marketing Engineer/Manager
Technical Marketing Engineer/Manager

SK hynix America • San Jose (CA)

On-site
USD 110,000 - 160,000
Top Tier health insurance
Paid time off & holidays
401k matching
+5
On/Off-Chip SI/PI Engineer
On/Off-Chip SI/PI Engineer

SK hynix America • San Jose (CA)

On-site
USD 150,000 - 320,000
Health insurance
Paid time off (PTO)
Paid parental leave
+4
3D Stacked DRAM-on-Logic Design Engineer
3D Stacked DRAM-on-Logic Design Engineer

SK hynix America • San Jose (CA)

On-site
USD 150,000 - 260,000
3D Stacked DRAM Design Engineer
3D Stacked DRAM Design Engineer

SK hynix America • San Jose (CA)

On-site
USD 150,000 - 260,000
Top Tier health insurance at no cost
Paid day offs: PTO + Holidays + Happy
Parental Leave Program
+4
Technical Marketing Engineer
Technical Marketing Engineer

SK hynix America • San Jose (CA)

On-site
USD 110,000 - 160,000
Top Tier health insurance
Paid time off
401k Matching
+5