Director, 3D-Stacked DRAM Logic Design

SK hynix America; San Jose (CA); On-site; USD 250,000 - 300,000; Full time

Benefits offered by this job

Health insurance

Paid time off

401k matching

FSA for Health Care & Dependent Care

Education reimbursement

Donation matching

Free meals

Job summary

SK hynix America seeks a Director of 3D Stacked Logic Design to lead high-speed digital IP for 3D-stacked DRAM peripheral circuits and DFT. You will drive RTL implementation, coordinate foundry verification, and build IP infrastructure while collaborating with U.S.-based customers to enable DRAM-on-Logic configurations.

You will manage cross-functional teams, strengthen market leadership in digital IP design, and deliver services that support co-design of 3D-stacked DRAM logic dies with

Qualifications

• Experience in RTL design and implementation for memory IP/SoC.
• Memory controller know-how is required.
• Memory BIST/DFT/DFD knowledge is preferred.
• Excellent English communication for cross-functional teams.

Responsibilities

• Lead design of high-speed digital IP for 3D-stacked DRAM peripheral circuits and DFT (RTL to implementation).
• Coordinate foundry verification and IP infrastructure setup for service-ready IPs.
• Ensure seamless IP integration in customer design environments and co-design with US customers.

Skills

RTL design

Memory controller

Verilog/VHDL

English communication

Education

Bachelor's degree in Electrical Engineering

Job description

SK hynix America seeks a Director of 3D Stacked Logic Design to lead high-speed digital IP for 3D-stacked DRAM peripheral circuits and DFT. You will drive RTL implementation, coordinate foundry verification, and build IP infrastructure while collaborating with U.S.-based customers to enable DRAM-on-Logic configurations.

You will manage cross-functional teams, strengthen market leadership in digital IP design, and deliver services that support co-design of 3D-stacked DRAM logic dies with