HBM Logic Architect: Lead US IP & RTL Design

SK hynix America; San Jose (CA); On-site; USD 150,000 - 260,000; Full time

Benefits offered by this job

Top Tier health insurance

PTO + Holidays + Happy Fridays

Parental Leave Program

401k Matching

Educational reimbursement up to $10,0

Donation Matching and volunteering

Corporate discount programs

Free Breakfast/Lunch/Dinner

Job summary

SK hynix America seeks an experienced HBM Logic Architect to lead the US-based HBM design team and engage with key customers. You will develop advanced HBM architectures for 2.5D/3D stacked memory and collaborate with ASIC/SoC teams to stay ahead in memory technology.

The role involves RTL design, verification, and PPA-focused optimization, with strong emphasis on partnerships with US customers and near-site support.

Qualifications

• Bachelor’s degree or higher in Electrical Engineering or related field; Master’s preferred.
• 5+ years of experience in semiconductor, ASIC/SoC, memory, or PHY design.
• Experience with high-speed digital PHY or IP design and analysis.
• DRAM memory controller design and analysis experience.
• DRAM DFT/DFD architecture, design, or analysis experience.
• PHY/TSV bit macro design, TSV PHY hard macro design, or 3D PHY design.
• Experience with power, performance, and area optimization (PPA) preferred.

Responsibilities

• Define, design, and validate digital IP for ASIC/SoC products.
• Perform RTL design and implementation based on specifications.
• Collaborate with cross-functional teams to define IP functionality and architecture.
• Review digital IP requirements and evaluate architecture options based on PPA targets.
• Develop RTL designs and verify them using standard methodologies.
• Provide design guidance for physical design implementation.
• Strengthen digital IP design capabilities for HBM/3D DRAM development and support near customer sites.
• Drive system-level co-optimization beyond standalone DRAM design.
• Build deep technical partnerships with U.S.-based customers.

Skills

High-speed digital PHY

DRAM memory controller

DRAM DFT/DFD

PHY/TSV bit macro

PPA optimization

Education

Bachelor’s degree or higher in Electrical Engineering

Master’s degree preferred

Job description

SK hynix America seeks an experienced HBM Logic Architect to lead the US-based HBM design team and engage with key customers. You will develop advanced HBM architectures for 2.5D/3D stacked memory and collaborate with ASIC/SoC teams to stay ahead in memory technology.

The role involves RTL design, verification, and PPA-focused optimization, with strong emphasis on partnerships with US customers and near-site support.