Design Verification Engineer

Apple; Cupertino (CA); On-site; USD 175,000 - 313,000; Full time

Job summary

An established industry player is seeking a talented Design Verification Engineer to join their innovative team. This role offers the unique chance to work on cutting-edge technology that will impact millions of users. You will be responsible for ensuring the highest quality of first silicon for IP designs, developing comprehensive verification methodologies, and executing detailed test plans. The company fosters a collaborative environment where creativity and technical expertise thrive. If you are passionate about solving complex challenges and making a difference in the tech world, this opportunity is perfect for you.

Benefits

Comprehensive medical and dental coverage

Retirement benefits

Discounted products and free services

Reimbursement for educational expenses

Discretionary bonuses

Employee stock purchase plan

Relocation assistance

Qualifications

• 10+ years of experience in design verification engineering.
• Strong knowledge of verification methodologies and tools.

Responsibilities

• Develop and execute verification plans for SoC/IP designs.
• Ensure bug-free first silicon through rigorous testing.

Skills

OOP

SystemVerilog

UVM

Python

Perl

TCL

PCIe

USB

DDR

Education

BS degree in technical subject area

Tools

simulators

waveform viewers

automation tools

coverage collection tools

gate level simulations

Job description

Design Verification Engineer

Cupertino, California, United States Hardware

Summary

Posted: Mar 28, 2025

Role Number: 200574763

At Apple, we work every single day to craft products that enrich people’s lives. Do you love working on challenges that no one has solved yet and changing the game? We have an opportunity for an outstandingly hardworking design verification engineer! As a member of our wide-ranging group, you will have the rare and extraordinary opportunity to craft upcoming products that will delight and encourage millions of Apple’s customers daily. This role is for a DV engineer who will enable us to produce fully functional first silicon for IP designs. The responsibilities include all phases of pre-silicon verification including but not limited to: establishing DV methodology, test-plan development, verification environment development including stimulus and checkers, test-writing, debug, coverage, sign-off for RTL freeze and tape-out.

Description

In this role, you will be responsible for ensuring bug-free first silicon for part of the SoC / IP and are encouraged to develop detailed test and coverage plans based on the micro-architecture. You are responsible for developing verification methodology suitable for the IP, ensuring a scalable and portable environment. You will get to develop verification environment, including all the respective components such as stimulus, checkers, assertions, trackers, coverage. Furthermore, you will develop verification plans for all features under your care, execute verification plans, including design bring-up, DV environment bring-up, regression enabling features, and debug of the test failures. You will also learn to develop block, IP and SoC level test-benches track and report DV progress using a variety of metrics, including bugs and coverage.

Minimum Qualifications

1. BS degree in technical subject area with minimum 10 years of proven experience.

Preferred Qualifications

1. Solid knowledge of OOP, SystemVerilog, and UVM
2. Solid knowledge in developing scalable and portable test-benches
3. Relevant experience with verification methodologies and tools such as simulators, waveform viewers, automation, coverage collection, gate level simulations
4. Experience with power-aware (UPF) or similar verification methodology
5. Excellent knowledge of one of the scripting languages such as Python, Perl, TCL.
6. Experience with serial protocols such as PCIe or USB, parallel protocol such as DDR is a plus but not required
7. Knowledge of formal verification methodology is a plus but not required

Pay & Benefits

At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $175,800 and $312,200, and your base pay will depend on your skills, qualifications, experience, and location.

Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation.

Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.

Apple is an equal opportunity employer that is committed to inclusion and diversity. We take affirmative action to ensure equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.