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An established industry player is seeking a Design Verification Engineer to join their dynamic engineering team in San Jose. This mid-level position offers an exciting opportunity to work with cutting-edge technology in a fast-paced environment. The ideal candidate will possess strong technical skills, including advanced knowledge of ASIC design and verification flows, as well as proficiency in scripting languages. If you thrive in collaborative settings and enjoy tackling diverse challenges, this role is perfect for you. Join a team dedicated to innovation and excellence in the semiconductor industry!
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Job Description
We are looking for a team player with solid technical skills to add to our core engineering team. Candidates must have a strong technical background and be capable of coming up to speed on new technologies quickly. Good communication skills, great problem-solving skills, and the ability to work both individually and collaboratively in a team environment are required. If you enjoy working in a fast-paced environment with the smartest team and the very latest technology, then this is the job for you! This is a mid-level engineering position, developing embedded software for our state Linux platform.
Location
San Jose / Austin, USA
Experience
3-4 years
Salary Range
Market Competitive
Design Verification Engineer
Full Time
Job Description
We are looking for a team player with solid technical skills to add to our core engineering team. Candidates must have a strong technical background and be capable of coming up to speed on new technologies quickly. Good communication skills, great problem-solving skills, and the ability to work both individually and collaboratively in a team environment are required. If you enjoy working in a fast-paced environment with the smartest team and the very latest technology, then this is the job for you! This is a mid-level engineering position, developing embedded software for our state Linux platform.
Eligibility
Role
Test bench development, Directed/constrained random test generation, Failure analysis and resolution, and coverage analysis.
Education
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