Design Infrastructure Engineer for HBM & IP Characterization

Micron; Richardson (TX); On-site; USD 120,000 - 180,000; Full time

Job summary

Micron Technology is seeking a Design Infrastructure Engineer to build, enable, and scale characterization infrastructure for HBM and related products. You will develop flows that support timing, power, and reliability modeling across multiple process nodes, including Micron internal nodes and external foundries such as TSMC.

You will collaborate with design, verification, and CAD teams to improve model accuracy, automate routines, and ensure silicon correlation and scalable signoffs for

Qualifications

• Bachelor's or Master's in Electrical Engineering or related field.
• Strong fundamentals in CMOS digital/mixed-signal design and PVT variation.
• Experience with standard or custom cell characterization, Liberty modeling, and SPICE.
• Proficiency in Python, Perl, or Tcl for automation.

Responsibilities

• Develop and sustain scalable infrastructure for standard and custom cell characterization.
• Build automated flows for multi-corner, multi-mode characterization across PVT spaces.
• Enable characterization across diverse process technologies including Micron and external foundries like TSMC.
• Support characterization for core dies and advanced HBM architectures.
• Collaborate with design teams to align characterization with performance and power targets.
• Lead debug and validation; improve model accuracy and data quality for signoff.

Skills

CMOS fundamentals

PVT variation

STA flows

Liberty modeling

SPICE-based simulation

Python scripting

Tcl scripting

Perl scripting

Education

Electrical Engineering degree

Tools

SiliconSmart

PrimeLib

Job description

Micron Technology is seeking a Design Infrastructure Engineer to build, enable, and scale characterization infrastructure for HBM and related products. You will develop flows that support timing, power, and reliability modeling across multiple process nodes, including Micron internal nodes and external foundries such as TSMC.

You will collaborate with design, verification, and CAD teams to improve model accuracy, automate routines, and ensure silicon correlation and scalable signoffs for