Design Engineer: Standard & Custom Cell Characterization

Micron Technology; Richardson (TX); On-site; USD 110,000 - 140,000; Full time

Benefits offered by this job

Medical benefits

Paid time off

Paid holidays

Relocation TBD

Job summary

Micron Technology’s Heterogeneous Integration Group is seeking a Design Infrastructure Engineer to build scalable characterization flows for standard and custom cells used in HBM and logic dies. You will enable cross-node characterization and collaborate with design teams to ensure robust timing, power, and data quality across multiple process technologies, including TSMC nodes.

Ideal candidates have strong scripting skills and experience with Liberty modeling and SPICE-based simulations, with

Qualifications

• Bachelor's or Master's degree in Electrical Engineering or related field.
• Experience with standard or custom cell characterization including Liberty modeling.
• Familiarity with STA flows, timing libraries, and SPICE-based simulations.

Responsibilities

• Develop and sustain scalable infrastructure for standard and custom cell characterization, including timing, power, noise, and SI modeling.
• Build reusable, automated flows for multi-corner, multi-mode characterization across PVT spaces.
• Develop Liberty model generation, validation, and regression frameworks for signoff readiness.
• Enable characterization across Micron internal nodes and external foundries like TSMC.
• Collaborate with design teams to define characterization requirements for TSV interfaces and high-speed paths.
• Lead debug and continuous improvement, root-causing mismatches between SPICE, extracted views, STA, and silicon.
• Create metrics and automated checks to ensure data quality and portability across IPs.

Skills

CMOS digital & analog/mixed-signal

PVT variation

Liberty modeling (CCS/ECSM)

SPICE-based simulation

Python/Perl/Tcl scripting

STA flows & timing libraries

Education

Bachelor's or Master’s Degree in Electrical Engineering

Tools

SiliconSmart

PrimeLib

Job description

Micron Technology’s Heterogeneous Integration Group is seeking a Design Infrastructure Engineer to build scalable characterization flows for standard and custom cells used in HBM and logic dies. You will enable cross-node characterization and collaborate with design teams to ensure robust timing, power, and data quality across multiple process technologies, including TSMC nodes.

Ideal candidates have strong scripting skills and experience with Liberty modeling and SPICE-based simulations, with