Characterization Design Engineer: Standard & Custom Cells

Micron Technology Inc; Richardson (TX); On-site; USD 120,000 - 150,000; Full time

Job summary

Micron Technology Inc seeks a Design Infrastructure Engineer to build scalable characterization infrastructure for standard and custom cells across HBM and other product lines. You will enable robust Liberty model generation, SPICE validation, and multi-node MCMM flows that influence timing and power targets.

Collaborate with design, CAD, and verification teams across process technologies to tackle variability and reliability while driving silicon correlation and signoff readiness for

Qualifications

• Bachelor’s or Master’s Degree in Electrical Engineering or related field.
• Strong fundamentals in CMOS digital and mixed-signal circuit development, device physics, and PVT variation.
• Experience with Liberty modeling (CCS/ECSM or equivalent) and SPICE-based simulation; STA flows.

Responsibilities

• Develop and sustain scalable infrastructure for standard cell and custom cell characterization across MCMM spaces.
• Build automated flows for multi-corner, multi-mode characterization and Liberty model generation.
• Collaborate across process technologies to address variability, aging, and reliability for HBM products.
• Lead debug, validation, and continuous improvement to ensure signoff readiness and data quality.

Skills

CMOS digital design

Mixed-signal design

Device physics

PVT variation analysis

STA timing analysis

Automation scripting

Education

Bachelor’s or Master’s Degree in Electrical Engineering

Tools

Liberty modeling (CCS/ECSM)

SPICE-based simulation

Python/Perl/Tcl scripting

Job description

Micron Technology Inc seeks a Design Infrastructure Engineer to build scalable characterization infrastructure for standard and custom cells across HBM and other product lines. You will enable robust Liberty model generation, SPICE validation, and multi-node MCMM flows that influence timing and power targets.

Collaborate with design, CAD, and verification teams across process technologies to tackle variability and reliability while driving silicon correlation and signoff readiness for