DDR PHY Design Engineer for High-Impact Innovation

Apple Inc.; Irvine (CA); Sur place; USD 122 700 - 214 300; Plein temps

Résumé du poste

Apple Inc. is seeking a results-oriented DDR Design Engineer in Irvine, CA to join the DDR PHY design team. You will contribute across all phases from concept to silicon bring-up, delivering high-performance, low-power digital designs.

Your role entails conceiving design direction, writing specs and tests, delivering RTL with assertions, and ensuring RTL quality via formal verification and static checks. You will collaborate closely with architects, circuit designers and verification engineers

Qualifications

• Bachelor's degree in Electrical Engineering.
• RTL design using Verilog or SystemVerilog, assertion writing.
• Design for Test (DFT) concepts and scan-based RTL streams.
• Timing constraints and clock domain crossing considerations.

Responsabilités

• Perform concept studies and provide direction on performance, gate count and power for various digital designs.
• Write detailed design specifications and test plans in close collaboration with architecture, circuit designers and verification engineers.
• Provide RTL description with assertions; use formal tools and static checkers to ensure RTL quality.
• Support design verification to ensure bug-free first silicon; drive functional and code coverage and timing closure; assist silicon bring-up and characterization.

Connaissances

RTL design

Verilog

SystemVerilog

DFT

clock domain crossing

timing closure

formal verification

Formation

Bachelor of Science in Electrical Engineering

Description du poste

Apple Inc. is seeking a results-oriented DDR Design Engineer in Irvine, CA to join the DDR PHY design team. You will contribute across all phases from concept to silicon bring-up, delivering high-performance, low-power digital designs.

Your role entails conceiving design direction, writing specs and tests, delivering RTL with assertions, and ensuring RTL quality via formal verification and static checks. You will collaborate closely with architects, circuit designers and verification engineers