DRAM Design Validation Engineer — SoC Memory Expert, Equity

Apple Inc.; Cupertino (CA); On-site; USD 144,600 - 218,000; Full time

Job summary

Apple Inc. in Cupertino is seeking a DRAM Design Validation Engineer to help design and integrate DRAM memories with SoCs, ensuring high performance and power efficiency across Apple devices.

You will work with design, verification and integration teams to define memory controller and DDR-PHY requirements, collaborating with vendors to validate LPDDR interfaces and achieve reliable, low-power operation.

Qualifications

• MS or BS degree with 4+ years in DRAM development.
• Expert in DRAM cell architectures.
• Experience in memory interface verification with DDR-PHY and Memory Controller.
• Experience in LPDDR IO (DDR/DDR2/DDR3/DDR4/DDR5) characterization and qualification.
• Strong background in computer architecture.

Responsibilities

• Work with design, verification and integration engineers to define DRAM memory controller and PHY requirements.
• Collaborate with Architecture, MCU, DDRPHY and DRAM vendors for Apple’s main memory feature.
• Ensure DRAM simulation meets Apple’s requirements.
• Ensure the internal and external DRAM silicon and package level testing needs are met.
• Debug RMA material with apparent DRAM related defects.

Skills

DRAM development

C/C++ programming

Memory interface verification

DDR-PHY knowledge

Computer architecture

Education

MS or BS in Electrical/Computer Engineering

Job description

Apple Inc. in Cupertino is seeking a DRAM Design Validation Engineer to help design and integrate DRAM memories with SoCs, ensuring high performance and power efficiency across Apple devices.

You will work with design, verification and integration teams to define memory controller and DDR-PHY requirements, collaborating with vendors to validate LPDDR interfaces and achieve reliable, low-power operation.