DDR Memory Validation Engineer – Bench Testing & Automation

Apple Inc.; Washington; On-site; USD 139,000 - 257,000; Full time

Benefits offered by this job

Medical and dental coverage

Retirement benefits

Employee stock purchase plan

Stock-based compensation programs

Relocation assistance

Job summary

Apple Inc. in Washington state is seeking a DDR memory test engineer to join a small bench team responsible for bring-up, debug, and characterization of memory interfaces for SoCs.

You will develop benchtop electrical tests exercising on-chip circuitry through FPGA, JTAG, SPI and analog interfaces. You will draft and execute scripts to automate tests, extract results and generate reports, providing design feedback and enabling correlation with simulation models.

Qualifications

• Bachelor's degree required plus 3 years of experience or equivalent.
• Experience in bench test bring-up, debug and memory characterization.
• Proficiency with Python scripting to automate tests and analyze data.

Responsibilities

• Be part of a small team responsible for bench test bring-up, debug and characterization of DDR Memory for SoCs.
• Develop benchtop electrical tests exercising on-chip circuitry via FPGA, JTAG, SPI and analog interfaces.
• Draft and execute scripts to automate tests, extract results and generate reports.
• Generate reports for characterization and debugging to provide design feedback.
• In-system PISI measurements for correlation with simulation models.
• Collaborate with cross-functional teams including Design, Systems, HW and SW.

Skills

DDR memory testing

Memory test development

JEDEC specs familiarity

DDR PHY understanding

Signal integrity concepts

Python scripting

Hands-on lab experience

Ownership and initiative

Strong communication skills

Education

Bachelor's Degree

Tools

Oscilloscope

Spectrum Analyzer

Pattern Generator

Logic Analyzer

Soldering

Job description

Apple Inc. in Washington state is seeking a DDR memory test engineer to join a small bench team responsible for bring-up, debug, and characterization of memory interfaces for SoCs.

You will develop benchtop electrical tests exercising on-chip circuitry through FPGA, JTAG, SPI and analog interfaces. You will draft and execute scripts to automate tests, extract results and generate reports, providing design feedback and enabling correlation with simulation models.