SoC DRAM Memory Validation Program Lead

Socket.dev; Austin (TX); On-site; USD 180,000 - 240,000; Full time

Job summary

Apple is seeking a Program Manager for the SoC DRAM Memory Subsystem Validation and Debug to drive readiness for our custom SoCs. You will oversee bring-up, validation, and debugging of high‑bandwidth memory subsystems, interfacing with DRAM architecture, Memory Controller Design, DV, DDR PHY, DRAM product engineering, and software teams.

This role fuels the DRAM roadmap and directs teams to deliver memory technologies from architecture to mass production, upholding Apple’s renowned quality

Qualifications

• BS degree and 10+ years of relevant experience.
• Experience in SOC DRAM memory design, validation, architecture or test/product engineering.
• Strong collaboration with cross-functional teams.

Responsibilities

• Drive memory subsystem bring-up, validation, and complex debugging for Apple’s SoCs.
• Coordinate with DRAM architecture, Memory Controller Design, DV, DDR PHY, DRAM product engineering, and software teams to deliver memory technologies.
• Help craft the DRAM roadmap and drive technologies from architecture to mass production while meeting Apple’s quality standards.

Skills

SOC DRAM Memory Design

Validation

Architecture

Test/Product Engineering

Education

BS

Job description

Apple is seeking a Program Manager for the SoC DRAM Memory Subsystem Validation and Debug to drive readiness for our custom SoCs. You will oversee bring-up, validation, and debugging of high‑bandwidth memory subsystems, interfacing with DRAM architecture, Memory Controller Design, DV, DDR PHY, DRAM product engineering, and software teams.

This role fuels the DRAM roadmap and directs teams to deliver memory technologies from architecture to mass production, upholding Apple’s renowned quality