Custom Timing CAD Engineer - Verifications & Flows

Apple, Inc.; Jackson (TN); On-site; USD 185,000 - 325,000; Full time

Benefits offered by this job

Stock programs

Employee stock purchase plan

Medical and dental coverage

Retirement benefits

Tuition reimbursement

Relocation assistance

Job summary

Apple Inc. in the United States seeks an entry-level engineer for its Custom Timing CAD team, focusing on transistor-level timing verification and formal verification. You will learn flows, develop automation, and collaborate with circuit designers across programs to enable clean sign-off.

You will work with NanoTime, ESP, PrimeTime, and HSPICE, contributing to methodology and tool improvements within Apple’s advanced chip design environment.

Qualifications

• BS degree in Electrical/Computer Engineering or related field.
• Strong programming or scripting in Perl, Python, TCL, or similar.
• Solid understanding of digital or custom IC design at transistor level.

Responsibilities

• Develop, maintain, and improve CAD flows and automation scripts.
• Support timing and verification runs, interpret results, and resolve issues.
• Drive timing and formal verification closure with circuit designers.
• Contribute to methodology documentation and guidelines.
• Engage with EDA vendors to report issues and drive tool improvements
• Build automation to scale support across programs.

Skills

Programming/scripting in Perl, Python,

Digital/Custom IC design understanding

Noise/Timing debugging

Cross-functional collaboration

Flow ownership and methodology

Education

BS degree in Electrical Engineering/Computer Engineering/CS

Tools

NanoTime

ESP

PrimeTime

HSPICE

DSPF/SPF formats

SystemVerilog RTL

RTL-to-schematic checking

Job description

Apple Inc. in the United States seeks an entry-level engineer for its Custom Timing CAD team, focusing on transistor-level timing verification and formal verification. You will learn flows, develop automation, and collaborate with circuit designers across programs to enable clean sign-off.

You will work with NanoTime, ESP, PrimeTime, and HSPICE, contributing to methodology and tool improvements within Apple’s advanced chip design environment.