Cross‑Layer Debugging Engineer for Compute Test

Teradyne; North Reading (MA); On-site; USD 141,000 - 226,000; Full time

Job summary

Teradyne North Reading is seeking a Hardware/Software Integration Engineer to own the seams between host applications, drivers, embedded software, and FPGA/ASIC/DAC programming. You will trace failures end-to-end, read RTL and schematics, and ensure consistent behavior across layers.

You will work on translation layers, calibration math, and system-level debugging, collaborating with cross-functional teams to resolve issues before hardware arrives.

Qualifications

• 6+ years of engineering experience across firmware and application software on at least one shipped product.
• Strong C/C++ and Python skills for embedded/Linux environments and automation.
• Excellent register-level debugging and ability to read datasheets, register maps, and DAC/ADC behavior.
• Experience solving cross-layer system problems and driving root cause.
• Ability to read schematics and understand analog intent and signal paths.
• Exposure to FPGA development flows and ability to read HDL.
• Experience with SPI, I2C, UART, PCIe, Ethernet/UDP.
• BS or MS in relevant engineering fields or equivalent experience.
• Ability to influence teams beyond reporting structure.

Responsibilities

• Trace and root-cause defects end to end across the instrument stack, from host app to DAC, and implement fixes.
• Own translation layers, API surfaces, register maps, and calibration math.
• Review code, HDL and schematics beyond your deliverables and update board revisions.
• De-risk new board revisions by verifying initialization and runtime paths.
• Build and improve debug tooling, timelines, and AI-assisted log analysis tools.
• Support internal diagnostics, calibration, continuity, and production verification paths.
• Align cross-team debugging efforts and maintain knowledge-sharing docs.
• Work back from customer use cases to verify end-to-end behavior across the stack.
• Set direction for cross-layer debugging and participate in reviews.
• Collaborate with component and silicon vendors to resolve system-level issues.
• Mentor engineers and expand cross-disciplinary debugging capabilities.

Skills

C/C++

Python

Register-level debugging

Cross-layer problem solving

Schematics reading

SPI/I2C/UART/PCIe/Ethernet

Communication

Firmware/board bring-up

FPGA exposure

AI-assisted debugging

Multi-processor embedded

HDL reading

Education

BS or MS in Computer/Electrical Engineering or Computer Science

Tools

FPGA

Job description

Teradyne North Reading is seeking a Hardware/Software Integration Engineer to own the seams between host applications, drivers, embedded software, and FPGA/ASIC/DAC programming. You will trace failures end-to-end, read RTL and schematics, and ensure consistent behavior across layers.

You will work on translation layers, calibration math, and system-level debugging, collaborating with cross-functional teams to resolve issues before hardware arrives.