Staff FPGA Engineer – High-Performance Test Platforms

Teradyne; North Reading (MA); On-site; USD 123,000 - 197,000; Full time

Job summary

Teradyne is seeking a Staff FPGA Engineer in North Reading, MA, to design and deliver high-performance FPGA-based solutions at the heart of our test platforms. You will work at the intersection of FPGA design, board-level hardware, and system architecture to solve complex timing and integration challenges.

Lead and develop FPGA logic for high-speed interfaces, collaborate across hardware, software, and verification teams, and mentor junior engineers while ensuring robust performance.

Qualifications

• 5+ years of hands-on FPGA design and development.
• Strong expertise in Verilog/SystemVerilog for design and debugging.
• Experience with AMD (Xilinx) and/or Intel FPGA toolchains, including synthesis, implementation, and timing closure.
• Strong understanding of digital design fundamentals and the ability to interpret schematics.
• Experience with high-speed interfaces such as PCIe, DDR, SerDes, or similar technologies and with protocols such as AXI4, USB, I2C, and SPI.
• Demonstrated ability to bring up and debug FPGA designs on hardware platforms.
• Scripting proficiency in TCL and Python for automation and tooling, plus experience with version control systems and collaborative development workflows.
• Strong system-level thinking, sound architectural judgment, and the ability to debug across FPGA, board, and software boundaries while balancing architectural decisions with implementation constraints.
• Excellent communication, collaboration, technical guidance, and mentoring skills in cross-functional environments.
• Preferred: SystemVerilog-based verification methodologies such as UVM; FPGA SoCs and embedded processor subsystems; ATE or measurement equipment design; signal integrity, high-speed serial interfaces, and transceivers; DDR, HBM, and Flash memory technologies; or AI tools for engineering design.

Responsibilities

• Lead FPGA solutions from requirements through implementation and bring-up.
• Develop high-performance FPGA logic involving complex interfaces and subsystem integration, along with automation and debug tools using TCL and Python.
• Collaborate with hardware, software, systems, and design verification teams to deliver cohesive system-level solutions and achieve appropriate simulation and test coverage.
• Support timing closure, resource optimization, performance tuning, lab bring-up, debugging, and root cause analysis using JTAG and lab instrumentation.
• Partner on PCB and system design decisions that affect FPGA performance and integration.
• Mentor less experienced engineers and provide technical guidance across the team.

Skills

FPGA design

Verilog/SystemVerilog

Xilinx/Intel toolchains

High-speed interfaces

TCL & Python scripting

Version control workflows

System-level thinking

Communication & mentoring

Tools

Xilinx Vivado

Intel Quartus

Job description

Teradyne is seeking a Staff FPGA Engineer in North Reading, MA, to design and deliver high-performance FPGA-based solutions at the heart of our test platforms. You will work at the intersection of FPGA design, board-level hardware, and system architecture to solve complex timing and integration challenges.

Lead and develop FPGA logic for high-speed interfaces, collaborate across hardware, software, and verification teams, and mentor junior engineers while ensuring robust performance.