Senior FPGA Architect: High-Performance Compute

Teradyne; North Reading (MA); On-site; USD 155,000 - 248,000; Full time

Job summary

Teradyne's Compute Test Division in North Reading, MA is seeking a Senior FPGA Architect to drive high-performance FPGA-based solutions at the heart of our test platforms.

You'll collaborate across hardware, software, and system teams to solve complex timing, interface, and integration challenges, delivering robust, scalable FPGA designs and validation strategies using TCL/Python scripting and lab instrumentation.

Qualifications

• 8+ years of hands-on FPGA design and development.
• Proficiency in Verilog/SystemVerilog for design and debugging.
• Experience with AMD/Xilinx and/or Intel FPGA toolchains including synthesis, implementation, and timing closure.
• Strong understanding of digital design fundamentals and ability to interpret schematics.
• Experience with high-speed interfaces such as PCIe, DDR, SerDes, or similar.
• Demonstrated ability to bring up and debug FPGA designs on hardware platforms.
• Experience with protocols such as AXI4, USB, I2C, SPI.
• Scripting proficiency (TCL, Python) for automation and tooling.
• Experience with version control systems and collaborative development workflows.

Responsibilities

• Drive FPGA design from architecture through implementation and bring-up.
• Architect and implement high-performance FPGA solutions involving complex interfaces and subsystem integration.
• Partner closely with hardware, software, and system engineering teams to deliver cohesive system-level solutions.
• Lead timing closure, resource optimization, and performance tuning for advanced FPGA designs.
• Define and execute validation strategies, including lab bring-up, debug, and root cause analysis using JTAG and lab instrumentation.
• Contribute to PCB and system design decisions impacting FPGA performance and integration.
• Develop automation and debug tools using scripting (TCL, Python) to improve design and validation workflows.

Skills

FPGA design

Verilog/SystemVerilog

Scripting (TCL, Python)

Version control

Tools

AMD/Xilinx toolchains

Intel FPGA toolchains

JTAG

Job description

Teradyne's Compute Test Division in North Reading, MA is seeking a Senior FPGA Architect to drive high-performance FPGA-based solutions at the heart of our test platforms.

You'll collaborate across hardware, software, and system teams to solve complex timing, interface, and integration challenges, delivering robust, scalable FPGA designs and validation strategies using TCL/Python scripting and lab instrumentation.